XRT83L34_05 Datasheet, PDF (93/99 Pages) Exar Corporation – QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

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XRT83L34
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR REV. 1.0.1
TABLE 49: AC ELECTRICAL CHARACTERISTICS
VDD=3.3V±5%, TA=25°C, UNLESS OTHERWISE SPECIFIED
PARAMETER
SYMBOL
MIN.
TYP.
E1 MCLK Clock Frequency
-
2.048
T1 MCLK Clock Frequency
-
1.544
MCLK Clock Duty Cycle
40
-
MCLK Clock Tolerance
-
±50
TCLK Duty Cycle
Transmit Data Setup Time
Transmit Data Hold Time
TCLK Rise Time(10%/90%)
TCLK Fall Time(90%/10%)
RCLK Duty Cycle
Receive Data Setup Time
Receive Data Hold Time
RCLK to Data Delay
T_CDU
30
50
T_SU
50
-
T_HO
30
-
TCLK_R
-
-
TCLK_F
-
-
R_CDU
45
50
R_SU
150
-
R_HO
150
-
RDY
-
-
RCLK Rise Time(10% to 90%) with
RCLK_R
-
-
25pF Loading.
RCLK Fall Time(90% to 10%) with
25pF Loading.
RCLK_F
MAX.
60
-
70
-
-
40
40
55
-
-
40
40
40
UNITS
MHz
MHz
%
ppm
%
ns
ns
ns
ns
%
ns
ns
ns
ns
ns
FIGURE 32. TRANSMIT CLOCK AND INPUT DATA TIMING
TCLK_R
TCLK_F
TCLK
TPOS/TDATA
or
TNEG
T_SU
T_HO
90