XRT83L34_05 Datasheet, PDF (60/99 Pages) Exar Corporation – QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT83L34
xr
REV. 1.0.1 QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
CONFIGURING THE MICROPROCESSOR INTERFACE TO OPERATE IN THE MOTOROLA-
ASYNCHRONOUS MODE
The user can configure the Microprocessor Interface to operate in the Motorola-Asynchronous Mode by tying
the UPTS1 (Pin 106) to the logic "HIGH" level.
Finally, if the Microprocessor Interface has been configured to operate in the Motorola-Asynchronous Mode,
then it will perform READ and WRITE operations as described below.
THE MOTOROLA-ASYNCHRONOUS READ-CYCLE:
If the Microprocessor Interface (of the XRT83L34 device) has been configured to operate in the Motorola-
Asynchronous Mode, then the Microprocessor Interface should do all of the following, anytime it wishes to read
out the contents of a register within the XRT83L34 device.
1. Place the address of the "target" register within the XRT83L34 device, on the Address Bus Input pins,
A[6:0].
2. While the Microprocessor is placing the address value on the Address Bus, the Address Decoding circuitry
(within the user’s system) should assert the CS* (Chip Select input) pin of the XRT83L34 device, by tog-
gling it "LOW". This action enables further communication between the MIcroprocessor and the XRT83L34
Microprocessor Interface block.
3. Assert the ALE/AS (Address Strobe) input pin by toggling it "LOW". This step enables the Address Bus
input drivers, within the Microprocessor Interface block of the XRT83L34 device.
4. Afterwards, the Microprocessor should indicate that this cycle is a "READ" cycle by setting the WR*/R/W*
(R/W*) input pin "HIGH".
5. Next, the Microprocessor should initiate the current bus cycle by toggling the RD*/DS* (Data Strobe) input
pin "LOW". This step enables the bi-directional data bus output drivers, within the XRT83L34 device. At
this point, the bi-directional data bus output drivers will proceed to drive the contents of the "Addressed"
register onto the bi-directional data bus, D[7:0].
6. Immediately after the Microprocessor toggles the "Data Strobe" (RD*/DS*) signal "LOW", the XRT83L34
device will continue to drive the RDY*/DTACK* output pin "HIGH". The XRT83L34 device does this in order
to inform the Microprocessor that the data (to be read from the data bus) is "NOT READY" to be latched
into the Microprocessor. In this case, the Microprocessor should continue to hold the "Data Strobe" (RD*/
DS*) signal "LOW" until it detects the "RDY*/DTACK*" output pin toggling "LOW".
7. After some settling time, the data on the "Bi-Directional" Data Bus will stabilize and can be read by the
Microprocessor. The XRT83L34 device will indicate that this data can be read by asserting the RDY*/
DTACK* (DTACK) output signal (by toggling it "LOW").
8. After the Microprocessor detects the RDY*/DTACK* signal (from the XRT83L34 device) toggling "LOW", it
can now terminate the Ready Cycle by toggling the "RD*/DS*" (Data Strobe) input pin "HIGH".
Figure _ presents a timing diagram that illustrates the behavior of the Microprocessor Interface signals during a "Motorola-
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