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XRT83L34_05 Datasheet, PDF (21/99 Pages) Exar Corporation – QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
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XRT83L34
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR REV. 1.0.1
SIGNAL NAME
A[6]
A[5]
A[4]
A[3]
A[2]
A[1]
A[0]
PIN #
57
58
59
60
61
62
63
TYPE
I
DESCRIPTION
Address Bus Input Pins/Jitter Attenuator Select Input Pins/Equalizer
Control Input pins:
The exact function of these input pins depends upon whether the XRT83L34
device has been configured to operate in the HOST or Hardware Mode, as
described below.
HOST Mode Operation - Address Bus Input Pins - A[6:0]:
These pins permits the Microprocessor to identity on-chip registers (within
the XRT83L34 device0 whenever it performs READ and WRITE operations
with the XRT83L34 device.
JASEL1
JASEL0
EQC4
EQC3
EQC2
EQC1
EQC0
INT
TRATIO
57
Microprocessor Interface Address Bus[6]
58
Microprocessor Interface Address Bus[5]
Microprocessor Interface Address Bus[4]
Microprocessor Interface Address Bus[3]
59
Microprocessor Interface Address Bus[2]
60
Microprocessor Interface Address Bus[1]
61
Microprocessor Interface Address Bus[0]
62
Jitter Attenuator Select Pins - Hardware Mode
63
Jitter Attenuator select pin 1
Jitter Attenuator select pin 0
See “Jitter Attenuator” on page 19.
Equalizer Control Pins - Hardware Mode
Equalizer Control Input pin 4
Equalizer Control Input pin 3
Equalizer Control Input pin 2
Equalizer Control Input pin 1
Equalizer Control Input pin 0
Pins EQC[4:0] select the Receive Equalizer and Transmitter Line Build Out.
See “Alarm Function//Redundancy Support” on page 21.
NOTE: Internally pulled “Low” with a 50kΩ resistor.
119
I
Interrupt Output - Host Mode
This pin goes “Low” to indicate an alarm condition has occurred within the
device. Interrupt generation can be globally disabled by setting the GIE bit to
"0" in the command control register.
119
Transmitter Transformer Ratio Select - Hardware mode
The function of this pin is to select the transmitter transformer ratio. See
“Alarm Function//Redundancy Support” on page 21.
NOTE: This pin is an open drain output and requires an external 10kΩ pull-
up resistor.
18