XRT83L34_05 Datasheet, PDF(51/99 Page) Exar Corporation – QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

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XRT83L34_05 Datasheet, PDF (51/99 Pages) Exar Corporation – QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

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XRT83L34

QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR REV. 1.0.1

DIGITAL LOOP-BACK (DLOOP)

Digital Loop-Back or Local Loop-Back allows the transmit clock and data to be looped back to the

corresponding receiver output pins through the encoder/decoder and jitter attenuator. In this mode, receive

data and clock are ignored, but the transmit data will be sent to the line uninterrupted. This loop back feature

allows users to configure the line interface as a pure jitter attenuator. The Digital Loop-Back signal flow is

shown in Figure 23.

FIGURE 23. DIGITAL LOOP-BACK MODE WITH JITTER ATTENUATOR SELECTED IN TRANSMIT PATH

TPOS

TNEG

Encoder

Timing

Control

TCLK

TTIP

TRING

RCLK

RPOS

RNEG

Decoder

Data &

Clock

Recovery

RTIP

RRING

DUAL LOOP-BACK

Figure 24 depicts the data flow in dual-loopback. In this mode, selecting the jitter attenuator in the transmit path

will have the same result as placing the jitter attenuator in the receive path. In dual Loop-Back mode the

recovered clock and data from the line are looped back through the transmitter to the TTIP and TRING without

passing through the jitter attenuator. The transmit clock and data are looped back through the jitter attenuator

to the RCLK and RPOS/RDATA and RNEG pins.

FIGURE 24. SIGNAL FLOW IN DUAL LOOP-BACK MODE