XRT83L34_05 Datasheet, PDF (64/99 Pages) Exar Corporation – QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT83L34
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REV. 1.0.1 QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
TABLE 19: MICROPROCESSOR REGISTER BIT DESCRIPTION
REG. #
ADDRESS
REG.
TYPE
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
9
0001001 R/W
X
Hex 0x09
B6S2_n
B5S2_n
B4S2_n
B3S2_n
10
0001010 R/W
X
Hex 0x0A
B6S3_n
B5S3_n
B4S3_n
B3S3_n
11
0001011 R/W
X
Hex 0x0B
B6S4_n
B5S4_n
B4S4_n
B3S4_n
12
0001100 R/W
X
Hex 0x0C
B6S5_n
B5S5_n
B4S5_n
B3S5_n
13
0001101 R/W
X
Hex 0x0D
B6S6_n
B5S6_n
B4S6_n
B3S6_n
14
0001110 R/W
X
Hex 0x0E
B6S7_n
B5S7_n
B4S7_n
B3S7_n
15
0001111 R/W
X
Hex 0x0F
B6S8_n
B5S8_n
B4S8_n
B3S8_n
Reset = 0 Reset = 0 Reset = 0
Reset = 0
Reset = 0
Command Control Global Registers for all 8 channels
16-31
001xxxx R/W Channel 1Control Register (see Registers 0-15 for description)
Hex 0x10-
0x1F
32-47
010xxxx R/W Channel 2 Control Register (see Registers 0-15 for description)
Hex 0x20-
ox2F
48-63
011xxxx R/W Channel 3 Control Register (see Registers 0-15 for description)
Hex 0x30-
0x3F
Command Control Global Registers
64
1000000 R/W SR/DR
Hex 0x40
ATAOS
RCLKE
TCLKE
DATAP
65
1000001 R/W E1arben
CLKSEL2
CLKSEL1
CLKSEL0 MCLKRATE
Hex 0x41
66
1000010 R/W GAUGE1
Gauge2 TXONCNTL TERCNTL
Hex 0x42
SL_1
67
1000011 R/W Reserved
Reserved
Reserved
Hex 0x43
Reserved
Reserved
Test Registers for channels 0 - 3
68
1000100 R/W Test byte 0
Hex 0x44
69
1000101 R/W Test byte 1
Hex 0x45
70
1000110 R/W Test byte 2
Hex 0x46
71
1000111 R/W Test byte 3
Hex 0x47
72
1001000 R/W Test byte 4
Hex 0x48
73
1001001 R/W Test byte 5
Hex 0x49
BIT 2
B2S2_n
B2S3_n
B2S4_n
B2S5_n
B2S6_n
B2S7_n
B2S8_n
Reset = 0
Reserved
RXMUTE
SL_0
Reserved
BIT 1
B1S2_n
BIT 0
B0S2_n
B1S3_n
B0S3_n
B1S4_n
B0S4_n
B1S5_n
B0S5_n
B1S6_n
B0S6_n
B1S7_n
B0S7_n
B1S8_n
B0S8_n
Reset = 0 Reset = 0
GIE
SRESET
EXLOS
ICT
EQG_1
EQG_0
Reserved Reserved
61