HB52R329E22-F Datasheet, PDF (6/66 Pages) Elpida Memory – 256 MB Registered SDRAM DIMM 32-Mword × 72-bit, 100 MHz Memory Bus, 2-Bank Module (36 pcs of 16 M × 4 Components) PC100 SDRAM

HB52R329E22-F
Serial PD Matrix*¹
Byte No. Function described
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Hex value Comments
0
Number of bytes used by
1 0 0 0 0 0 0 0 80
128
module manufacturer
1
Total SPD memory size
0 0 0 0 1 0 0 0 08
256 byte
2
Memory type
0 0 0 0 0 1 0 0 04
SDRAM
3
Number of row addresses bits 0 0 0 0 1 1 0 0 0C
12
4
Number of column addresses 0 0 0 0 1 0 1 0 0A
10
bits
5
Number of banks
0 0 0 0 0 0 1 0 02
2
6
Module data width
0 1 0 0 1 0 0 0 48
72 bit
7
Module data width (continued) 0 0 0 0 0 0 0 0 00
0 (+)
8
Module interface signal levels 0 0 0 0 0 0 0 1 01
LVTTL
9
SDRAM cycle time
(highest CE latency)
10 ns
1 0 1 0 0 0 0 0 A0
CL = 3
10
SDRAM access from Clock
0 1 1 0 0 0 0 0 60
*³
(highest CE latency)
6 ns
11
Module configuration type
0 0 0 0 0 0 1 0 02
ECC
12
Refresh rate/type
1 0 0 0 0 0 0 0 80
Normal
(15.625 µs)
Self refresh
13
SDRAM width
0 0 0 0 0 1 0 0 04
16M × 4
14
Error checking SDRAM width 0 0 0 0 0 1 0 0 04
×4
15
SDRAM device attributes:
0 0 0 0 0 0 0 1 01
minimum clock delay for back-to-
back random column addresses
1 CLK
16
SDRAM device attributes:
Burst lengths supported
1 0 0 0 1 1 1 1 8F
1, 2, 4, 8,
full page
17
SDRAM device attributes:
0 0 0 0 0 1 0 0 04
4
number of banks on SDRAM
device
18
SDRAM device attributes:
0 0 0 0 0 1 1 0 06
2, 3
CE latency
(-A6F)
(-B6F)
0 0 0 0 0 1 0 0 04
3
19
SDRAM device attributes:
0 0 0 0 0 0 0 1 01
0
S latency
Data Sheet No. E0112H10
6