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HB52R329E22-F Datasheet, PDF (23/66 Pages) Elpida Memory – 256 MB Registered SDRAM DIMM 32-Mword × 72-bit, 100 MHz Memory Bus, 2-Bank Module (36 pcs of 16 M × 4 Components) PC100 SDRAM
HB52R329E22-F
Command Operation
Command Truth Table
The SDRAM module recognizes the following commands specified by the S, RE, CE, W and address pins.
CKE
Command
A0
Symbol n - 1 n S RE CE W A12/A13 A10 to A11
Ignore command
DESL
H ×H× × × ×
××
No operation
NOP
H ×L H H H×
××
Burst stop in full page
BST
H ×L H H L ×
××
Column address and read command READ
H ×L H L HV
LV
Read with auto-precharge
READ A H × L H L H V
HV
Column address and write command WRIT
H ×L H L L V
LV
Write with auto-precharge
WRIT A H × L H L L V
HV
Row address strobe and bank active ACTV
H ×L L H HV
VV
Precharge select bank
PRE
H ×L L H L V
L×
Precharge all bank
PALL
H ×L L H L ×
H×
Refresh
REF/SELF H V L L L H ×
××
Mode register set
MRS
H ×L L L L V
VV
Note: H: VIH. L: VIL. ×: VIH or VIL. V: Valid address input
Ignore command [DESL]: When this command is set (S is High), the SDRAM module ignore command input
at the clock. However, the internal status is held.
No operation [NOP]: This command is not an execution command. However, the internal operations
continue.
Burst stop in full-page [BST]: This command stops a full-page burst operation (burst length = full-page) and
is illegal otherwise. When data input/output is completed for a full page of data, it automatically returns to the
start address, and input/output is performed repeatedly.
Column address strobe and read command [READ]: This command starts a read operation. In addition, the
start address of burst read is determined by the column address and the bank select address (BA). After the read
operation, the output buffer becomes High-Z.
Read with auto-precharge [READ A]: This command automatically performs a precharge operation after a
burst read with a burst length of 1, 2, 4 or 8. When the burst length is full-page, this command is illegal.
Data Sheet No. E0112H10
23