HB52R329E22-F Datasheet, PDF (45/66 Pages) Elpida Memory – 256 MB Registered SDRAM DIMM 32-Mword × 72-bit, 100 MHz Memory Bus, 2-Bank Module (36 pcs of 16 M × 4 Components) PC100 SDRAM

HB52R329E22-F
Read with auto precharge to Read command interval
1. Different bank: When some banks are in the active state, the second read command (another bank) is
executed. Even when the first read with auto-precharge is a burst read that is not yet finished, the data read by
the second command is valid. The internal auto-precharge of one bank starts at the next clock of the second
command.
Read with Auto Precharge to Read Command Interval (Different bank)
CK
Command
BA
Dout
READ A
bank0
Read A
READ
bank3
Read
out A0
Note: Internal auto-precharge starts at the timing indicated by " ".
out A1
out B0 out B1
CE Latency = 4
Burst Length = 4
2. Same bank: The consecutive read command (the same bank) is illegal.
Write with auto precharge to Write command interval
1. Different bank: When some banks are in the active state, the second write command (another bank) is
executed. In the case of burst writes, the second write command has priority. The internal auto-precharge of one
bank starts at the next clock of the second command .
Write with Auto Precharge to Write Command Interval (Different bank)
CK
Command
BA
WRIT A
WRIT
Din
in A0
in A1
in B0
in B1
bank0
Write A
bank3
Write
Note: Internal auto-precharge starts at the timing indicated by " ".
in B2
in B3
Burst Length = 4
2. Same bank: The consecutive write command (the same bank) is illegal.
Data Sheet No. E0112H10
45