HB52R329E22-F Datasheet, PDF(30/66 Page) Elpida Memory – 256 MB Registered SDRAM DIMM 32-Mword × 72-bit, 100 MHz Memory Bus, 2-Bank Module (36 pcs of 16 M × 4 Components) PC100 SDRAM

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HB52R329E22-F Datasheet, PDF (30/66 Pages) Elpida Memory – 256 MB Registered SDRAM DIMM 32-Mword × 72-bit, 100 MHz Memory Bus, 2-Bank Module (36 pcs of 16 M × 4 Components) PC100 SDRAM

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HB52R329E22-F

From PRECHARGE state, command operation

To [DESL], [NOP] or [BST]: When these commands are executed, the SDRAM module enters the IDLE state

after tRP has elapsed from the completion of precharge.

From IDLE state, command operation

To [DESL], [NOP], [BST], [PRE] or [PALL]: These commands result in no operation.

To [ACTV]: The bank specified by the address pins and the ROW address is activated.

To [REF], [SELF]: The SDRAM module enters refresh mode (auto-refresh or self-refresh).

To [MRS]: The SDRAM module enters the mode register set cycle.

From ROW ACTIVE state, command operation

To [DESL], [NOP] or [BST]: These commands result in no operation.

To [READ], [READ A]: A read operation starts. (However, an interval of tRCD is required.)

To [WRIT], [WRIT A]: A write operation starts. (However, an interval of tRCD is required.)

To [ACTV]: This command makes the other bank active. (However, an interval of tRRD is required.)

Attempting to make the currently active bank active results in an illegal command.

To [PRE], [PALL]: These commands set the SDRAM module to precharge mode. (However, an interval of

tRAS is required.)

From READ state, command operation

To [DESL], [NOP]: These commands continue read operations until the burst operation is completed.

To [BST]: This command stops a full-page burst.

To [READ], [READ A]: Data output by the previous read command continues to be output. After CE latency,

the data output resulting from the next command will start.

To [WRIT], [WRIT A]: These commands stop a burst read, and start a write cycle.

To [ACTV]: This command makes other banks bank active. (However, an interval of tRRD is required.)

Attempting to make the currently active bank active results in an illegal command.

To [PRE], [PALL]: These commands stop a burst read, and the SDRAM module enters precharge mode.

Data Sheet No. E0112H10

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