HB52R329E22-F Datasheet, PDF(20/66 Page) Elpida Memory – 256 MB Registered SDRAM DIMM 32-Mword × 72-bit, 100 MHz Memory Bus, 2-Bank Module (36 pcs of 16 M × 4 Components) PC100 SDRAM

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HB52R329E22-F Datasheet, PDF (20/66 Pages) Elpida Memory – 256 MB Registered SDRAM DIMM 32-Mword × 72-bit, 100 MHz Memory Bus, 2-Bank Module (36 pcs of 16 M × 4 Components) PC100 SDRAM

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HB52R329E22-F

Relationship Between Frequency and Minimum Latency

Parameter

Frequency (MHz)

tCK (ns)

Active command to column command (same bank)

Active command to active command (same bank)

HB52R329E22

-A6F/B6F

100

PC100

Symbol Symbol 10

I RCD

I RC

Active command to precharge command (same bank) IRAS

Precharge command to active command (same bank) IRP

Write recovery or data-in to precharge command (same IDPL

bank)

Tdpl 1

Active command to active command (different bank) IRRD

Self refresh exit time

I SREX

Tsrx

Last data in to active command

(Auto precharge, same bank)

I APW

Tdal 3

Self refresh exit to command input

I SEC

Precharge command to high impedance

(CE latency = 3)

I HZP

Troh 3

(CE latency = 4)

I HZP

Troh 4

Last data out to active command (auto precharge)

I APR

(same bank)

Last data out to precharge (early precharge)

(CE latency = 3)

(CE latency = 4)

Column command to column command

Write command to data in latency

DQMB to data in

DQMB to data out

CKE to CK disable

S to command disable

Power down exit to command input

I EP

I CCD

I WCD

I DID

I DOD

I CLE

I RSA

I CDD

I PEC

â2

â3

Tccd 1

Tdwd 1

Tdqm 1

Tdqz 3

Tcke 2

Tmrd 1

Notes

= [IRAS + IRP]

= [IDPL + IRP]

= [IRC]

Data Sheet No. E0112H10

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