HB52R329E22-F Datasheet, PDF (10/66 Pages) Elpida Memory – 256 MB Registered SDRAM DIMM 32-Mword × 72-bit, 100 MHz Memory Bus, 2-Bank Module (36 pcs of 16 M × 4 Components) PC100 SDRAM

HB52R329E22-F
Block Diagram
RS0
RS1
RDQMB0
4 10 Ω
DQ0 to DQ3
4 10 Ω
DQ4 to DQ7
RDQMB1
4 10 Ω
DQ8 to DQ11
4 ^{10 Ω}
DQ12 to DQ15
4
CB0 to CB3
RS2
RS3
RDQMB2
10 Ω
4 10 Ω
DQ16 to DQ19
4 ^{10 Ω}
DQ20 to DQ23
RDQMB3
4 10 Ω
DQ24 to DQ27
4 10 Ω
DQ28 to DQ31
S0, S1, S2, S3
DQMB0 to DQMB7
BA0 to BA1
A0 to A11
RE
CE
CKE0
W
V_CC
REGE
PLL CK
R
E
G
I
S
T
E
R
10k
DQMB CS
D0
I/O0
to I/O3
DQMB CS
D1
I/O0
to I/O3
DQMB CS
D2
I/O0
to I/O3
DQMB CS
D3
I/O0
to I/O3
DQMB CS
D4
I/O0
to I/O3
RDQMB4
DQMB CS
D18
I/O0
to I/O3
DQ32 to DQ35
4
DQMB CS
D19
I/O0
to I/O3
DQ36 to DQ39
4
RDQMB5
DQMB CS
D20
I/O0
to I/O3
DQ40 to DQ43
4
DQMB CS
D21
I/O0
to I/O3
DQ44 to DQ47
4
DQMB CS
D22
I/O0
to I/O3
4
CB4 to CB7
10 Ω
10 Ω
10 Ω
10 Ω
10 Ω
DQMB CS
D9
I/O0
to I/O3
DQMB CS
D10
I/O0
to I/O3
DQMB CS
D11
I/O0
to I/O3
DQMB CS
D12
I/O0
to I/O3
DQMB
D13
I/O0
to I/O3 CS
DQMB CS
D27
I/O0
to I/O3
DQMB CS
D28
I/O0
to I/O3
DQMB CS
D29
I/O0
to I/O3
DQMB CS
D30
I/O0
to I/O3
DQMB
D31
I/O0
to I/O3 CS
DQMB CS
D5
I/O0
to I/O3
RDQMB6
DQMB CS
D23
I/O0
to I/O3
DQ48 to DQ51
4
10 Ω
DQMB CS
D14
I/O0
to I/O3
DQMB CS
D32
I/O0
to I/O3
DQMB CS
D6
I/O0
to I/O3
DQMB CS
D24
I/O0
to I/O3
4
DQ52 to DQ55
10 Ω
DQMB CS
D15
I/O0
to I/O3
DQMB CS
D33
I/O0
to I/O3
DQMB CS
D7
I/O0
to I/O3
RDQMB7
DQMB CS
D25
I/O0
to I/O3
DQ56 to DQ59
4
10 Ω
DQMB CS
D16
I/O0
to I/O3
DQMB CS
D34
I/O0
to I/O3
DQMB CS
D8
I/O0
to I/O3
DQMB CS
D26
I/O0
to I/O3
DQ60 to DQ63
4
10 Ω
DQMB CS
D17
I/O0
to I/O3
DQMB CS
D35
I/O0
to I/O3
CK0
RS0, RS1, RS2, RS3
RDQMB0 to RDQMB7
RBA0 to RBA1 -> BA0 to BA1: SDRAMs D0 to D35 _CK1
RA0 to RA11 -> A0 to A11: SDRAMs D0 to D35 _{to CK3}
RRAS -> RAS: SDRAMs D0 to D35
RCAS -> CAS: SDRAMs D0 to D35
RCKE0 -> CKE: SDRAMs D0 to D35
RW -> WE: SDRAMs D0 to D35
V_CC
0.0022 µF × 25 pcs
Serial PD
V_SS
10 Ω
PLL
12 pF
10 Ω
V_SS
12 pF
CK: SDRAMs
(D0 to D35)
Register
V_CC (D0 to D35, U0)
0.22 µF × 19 pcs
V_SS (D0 to D35, U0)
SCL
SCL
SDA
SDA
U0
WP
A0 A1 A2
47 kΩ
* D0 to D35: HM5264405
PLL: 2510
Register: 162835
U0: 2k bit EEPROM
Notes:
SA0 SA1 SA2 V_SS
1. The SDA pull-up resistor is required due to the open-drain/open-collector output.
2. The SCL pull-up resistor is recommended because of the normal SCL line inacitve "high" state.
Data Sheet No. E0112H10
10