HB52R329E22-F Datasheet, PDF(50/66 Page) Elpida Memory – 256 MB Registered SDRAM DIMM 32-Mword × 72-bit, 100 MHz Memory Bus, 2-Bank Module (36 pcs of 16 M × 4 Components) PC100 SDRAM

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HB52R329E22-F Datasheet, PDF (50/66 Pages) Elpida Memory – 256 MB Registered SDRAM DIMM 32-Mword × 72-bit, 100 MHz Memory Bus, 2-Bank Module (36 pcs of 16 M × 4 Components) PC100 SDRAM

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HB52R329E22-F

Write command to Precharge command interval (same bank): When the precharge command is executed

for the same bank as the write command that preceded it, the minimum interval between the two commands is 1

clock. However, if the burst write operation is unfinished, the input data must be masked by means of DQMB

for assurance of the clock defined by tDPL.

WRITE to PRECHARGE Command Interval (same bank):

Burst Length = 4 (To stop write operation)

Command

DQMB

WRIT PRE/PALL

Din

Command

DQMB

tDPL

WRIT

PRE/PALL

Din

in A0

in A1

tDPL

Burst Length = 4 (To write all data)

Command

DQMB

Din

WRIT

PRE/PALL

in A0

in A1

in A2

in A3

tDPL

Data Sheet No. E0112H10

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