STC5230_15 Datasheet, PDF (39/64 Pages) Connor-Winfield Corporation – Line Card Clock

STC5230
Synchronous Clock for SETS
Data Sheet
of holdover history is used: Device Holdover History or User Supplied History.
1 = Available
0 = Not available
HHA
1
1
0
0
AHR
1
0
0
1
Holdover Status
Holdover History available: Device Holdover History tracking on the current active reference
Holdover History available: Device Holdover History based on last available history
Holdover History not available
Not applicable
T0_Accu_Flush, 0x38 (W)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x38
Not used
HO flush
Writing to this register will perform a flush of the accumulated history. Bit HO flush determines which histories
are flushed.
HO flush Device Holdover History Tracking
0 = Flush and reset T0 long term history only
1 = Flush/reset both T0 long term history and the T0 device holdover history
T4_Control_Mode, 0x39 (R/W)
Address
0x39
Bit7
Bit6
Not used
Bit5
OOP
Bit4
Manual/
Auto
Bit3
Revertive
Bit2
HO_Usage
Bit1
Not used
Bit0
Phase
Align
Mode control bits for T4.
Phase Align Mode
HO_Usage
Revertive
Manual/Auto
OOP
0 = Arbitrary, 1 = Align
0 = Device Holdover History (DHH) is used; 1 = User supplied history is used.
0 = Non-revertive; 1 = Revertive.
0 = Manual; 1 = Auto.
In manual mode, when the selected active reference is out of the pull-in range, as
specified in register Disqualification_Range (0x10). OOP will determine if the ref-
erence is to be followed, 0 = Follow, 1 = Don’t follow.
Default value: 0
T4_Bandwidth, 0x3a (R/W)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x3a
Not used
Bandwidth select
Sets the T4 loop bandwidth:
Page 39 of 64 TM102 Rev: 3.0
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: September 14, 2011