STC5230_15 Datasheet, PDF (27/64 Pages) Connor-Winfield Corporation – Line Card Clock

/* reset the page FIFO buffer */
- for i = 0 to 163 step 1
begin
- write (i) to register EEP_Controller_Page;
/* set the page index */
- for j = 0 to 63 step 1
begin
- write data[64*i+j] to register
EEP_Controller_Data;
end
- write 0x01 to register EEP_Controller_Cmd;
/* issue the write command */
- busy wait until bit “ready” in register
EEP_Controller_Mode is equal to ‘1’;
end
- write 0x00 to register EEP_Controller_Mode;
/* turn off the write feature */
end of procedure EEP_Write
Procedure EEP_Readback
begin
- busy wait until bit “ready” in register
EEP_Controller_Mode is equal to ‘1’;
- for i = 0 to 163 step 1
begin
- write (i) to register EEP_Controller_Page;
/* set the page index */
- write 0x02 to register EEP_Controller_Cmd;
/* issue the read command */
- busy wait until bit “ready” in register
EEP_Controller_Mode is equal to ‘1’;
- for j = 0 to 63 step 1
begin
- read and copy the value of register
EEP_Controller_Data into data[64*i+j];
end
end
/* --- *
The data array data[10496] is then carrying the hard-
ware/firmware configuration data, starting from index
0.
* --- */
end of procedure EEP_Read
Table 6 is the recommended list of compatible
EEPROM for applications and Figure 9 is the
EEPROM interfaces:
Table 8: Compatible EEPROM
Manufacturer
ATMEL
Part Number
AT25128A
STC5230
Synchronous Clock for SETS
Data Sheet
EEPROM
ATMEL
AT25128A
C_FS_unctE_iE_oP_n__aCS_{l Specification}
SCK EEP_SCK
SI
EEP_SI ^STC5230
SO
EEP_SO
Both WP and HOLD
have to be tied high
Figure 9: EEPROM Configuration
Page 27 of 64 TM102 Rev: 3.0
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: September 14, 2011