STC5230_15 Datasheet, PDF (36/64 Pages) Connor-Winfield Corporation – Line Card Clock

STC5230
Synchronous Clock for SETS
Data Sheet
Selects the active reference for T0 in manual reference select mode.
Bit 3 ~ Bit 0
0
1 ~ 12
13
14, 15
Default value: 0
T0_Device_Holdover_History, 0x20 (R)
Selection
Freerun
Sync with Ref 1 ~ Ref 12
Holdover
Reserved
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x20
Bits 0 - 7 of 32 bit Device Holdover History
0x21
Bits 8 - 15 of 32 bit Device Holdover History
0x22
0x23
Bits 16 - 23 of 32 bit Device Holdover History
Bits 24 - 31 of 32 bit Device Holdover History
Device holdover history for T0 relative to MCLK. 2’s complement. Resolution is 0.745x10^-3ppb.
Default value: 0
T0_Long_Term_Accu_History, 0x24 (R)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x24
0x25
0x26
0x27
Bits 0 - 7 of 32 bit Long Term History
Bits 8 - 15 of 32 bit Long Term History
Bits 16 - 23 of 32 bit Long Term History
Bits 24 - 31 of 32 bit Long Term History
Long term accumulated history for T0 relative to MCLK. 2’s complement. Resolution is 0.745x10^{- 3} ppb.
T0_Short_Term_Accu_History, 0x28 (R)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x28
0x29
0x2a
0x2b
Bits 0 - 7 of 32 bit Short Term History
Bits 8 - 15 of 32 bit Short Term History
Bits 16 - 23 of 32 bit Short Term History
Bits 24 - 31 of 32 bit Short Term History
Short term accumulated history for T0 relative to MCLK. 2’s complement. Resolution is 0.745x10^-3 ppb.
Page 36 of 64 TM102 Rev: 3.0
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: September 14, 2011