AMD-762 Datasheet, PDF (66/122 Pages) Advanced Micro Devices – System Controller

Preliminary Information
AMD-762™ System Controller Data Sheet
24416C—December 2001
measured with respect to the voltage levels indicated by
Figure 13 on page 55.
The clock period stability specifies the variance (jitter)
allowed between successive periods of the clock inputs
measured at appropriate reference voltage. This parameter
must be considered as one of the elements of clock skew
between the AMD-762 system controller and the system logic.
Table 16. SYSCLK Switching Requirements
Symbol
Parameter Description
Preliminary Data
Min
Max
1/t₂
Frequency
133 MHz
t₃/t₂ x 100 SYSCLK Duty Cycle
45%
55%
t₄
SYSCLK Falling Edge Slew Rate
TBD
1.0 V/ns
t₅
SYSCLK Rising Edge Slew Rate
TBD
1.0 V/ns
SYSCLK Period Stability
100 MHz
± 200 ps
133 MHz
± 150 ps
*_{This table contains preliminary information, which is subject to change.}
Figure
12
12
12
12
Comments
1.15-V reference
1.15-V reference
1.5 V
1.15 V
0.8 V
t₅
t₂
t₃
t₄
Figure 12. SYSCLK Waveform
54
Electrical Data
Chapter 4