AMD-762 Datasheet, PDF (65/122 Pages) Advanced Micro Devices – System Controller

24416C—December 2001
Preliminary Information
AMD-762™ System Controller Data Sheet
4.4
Power Dissipation
Table 15 shows typical and maximum power dissipation of the
AMD-762 system controller during normal and reduced power
states. The measurements are taken with the V_DD shown.
Table 15. Typical and Maximum Power Dissipation*
Supply
Normal Operation
Low-Power States
Typical Maximum ACPI S1 State ACPI S3 State
VDD_CORE
100 MHz 3 W
133 MHz 4 W
4.5 W
6W
125 mW
165 mW
50 mW
65 mW
*This table contains preliminary information, which is subject to change.
4.5
4.5.1
Switching Characteristics and Requirements
The AMD-762 system controller signal switching characteristics
and requirements are presented in Tables 16 through 27. All
signal timings are based on the following conditions:
n The target signals are input or output signals that are
switching from logical 0 to 1, or from logical 1 to 0.
n Measurements are taken from the time the reference signal
(AGPCLK, PCICLK, CLKOUT, SYSCLK, or RESET#) passes
through 1.5 V to the time the target signal passes through 1.5 V.
n Parameters are within the range of those listed in
“Operating Ranges” on page 48.
Clock Switching Requirements
Table 16 contains the switching characteristics of the SYSCLK
input to the AMD-762 system controller for 100-MHz processor
bus operation. These timings are all measured with respect to
the voltage levels indicated by Figure 12 on page 54. Clock
skew requirements are shown in Figure 14 on page 56. Table 17
on page 55 contains the switching characteristics of the
AGPCLK input for 66-MHz PCI bus operation. Table 18 on
page 55 contains the switching characteristics of the PCICLK
input for 33-MHz PCI bus operation. These timings are all
Chapter 4
Electrical Data
53