AMD-762 Datasheet, PDF (47/122 Pages) Advanced Micro Devices – System Controller

24416C—December 2001
Preliminary Information
AMD-762™ System Controller Data Sheet
3 Test
The AMD-762™ system controller supports test modes that
may be used in some cases for motherboard manufacturing test
and debug. The following test modes are available on the
AMD-762 system controller:
• Three-state test
• NAND tree test
• PLL bypass test
• Clock output test
Three-state test and NAND tree test can be used to prevent the
AMD-762 system controller from driving its pins and to verify
connectivity of the AMD-762 system controller to the
motherboard. The PLL bypass and clock output test modes are
provided primarily for motherboard debug and can be used to
verify system clocking and drive slower clocks into the system.
Test modes are invoked in the AMD-762 system controller by
the assertion of the TEST# pin in conjunction with enabling
specific pinstraps on the PCI bus AD[31:0] pins, as described in
each section. These pins can be used as pinstraps for various
functions by connecting either a pullup or pulldown resistor as
required to enable or disable the function (a 10-kohm resistor
should be used). The pinstraps are sampled at reset and
latched, and the value of most pinstraps can be read in the
Configuration Status register (Dev 0:F0:0x88).
Asserting the RESET# pin and de-asserting the TEST# pin
causes the AMD-762 system controller to exit test modes.
3.1 Board (Three-State) Test Mode
Board test mode forces all AMD-762 system controller outputs
to a high impedance to allow board-level test equipment to
drive the nodes normally driven by AMD-762 system controller
pins to test board connectivity. The outputs are three-stated
after a maximum of six clocks are driven on the SYSCLK and
AGPCLK pins. The minimum number of clocks is required due
Chapter 3
Test
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