AMD-762 Datasheet, PDF (64/122 Pages) Advanced Micro Devices – System Controller

Preliminary Information
AMD-762™ System Controller Data Sheet
24416C—December 2001
Table 14. AGP 2x and 4x Mode DC Specifications*
DC Specifications for 2x Mode Only at 3.3-Volt Signalling
Symbol
V_REF
I_REF
C_IN
∆C_IN
Parameter Description
Condition
Input Reference Voltage
V_REF Pin Input Current
0 < V_IN < V_DDQ
Input Pin Capacitance
Strobe to Data Pin Capacitance Delta
Min
0.39 V_DDQ
–1
Max
0.41 V_DDQ
±10
8
2
Units
V
µA
pF
pF
Notes
1, 2
2
3
3, 4
DC Specifications for 2x or 4x Mode at 1.5-Volt Signalling
Symbol
Parameter Description
Condition
Min
Max
Units Notes
V_REF
Input Reference Voltage
0.48 V_DDQ 0.52 V_DDQ
V
1, 2
I_REF
V_REF Pin Input Current
0 < V_IN < V_DDQ
±5
µA
2
C_IN
Input Pin Capacitance
8
pF
3
∆C_IN
Strobe to Data Pin Capacitance Delta
2x Mode
4x Mode
–1
2
–1
1
pF
3, 4
Notes:
*This table contains preliminary information, which is subject to change.
1. AGP allows differential input receivers to achieve the tighter timing tolerances needed for 133 Mbytes/s. Nominal value of V_REF is 0.4
V_DDQ for 3.3-V signalling and 0.5-V_DDQ for 1.5-V signalling. V_REF can be designed with 2% resistors to achieve the specified minimum
and maximum
nominal V_DDQ
values.
(3.3 V),
TVh_Re_EFvaislu1e.3o2fVV_{R±EF2i.s5%int.eAndsiendglteo}
specify the center point of
input interface buffer can
the V_IL/V_IH range. For the 3.3-V signalling case, at
be designed to meet the V_IL/V_IH levels of both the
AGP and PCI specifications. As in other AGP specifications, note that the V_DDQ references the I/O ring supply voltage and not the
component supply.
2. Although a differential input buffer is not a required implementation, it is recommended especially at higher data transfer rates
where there is less timing margin. All designs regardless of implementation style must meet all other specifications. Component
designs requiring a reference are required to adhere to the V_REF and I_REF specifications and to facilitate a common reference circuit.
(A common reference circuit is not applicable to add-in card designs, because V_REF is not supplied via the connector.)
3. Capacitance specifications refer only to pin capacitance on the AGP-compliant components used on the AGP interface.
4. Delta C_IN is required to restrict timing variations resulting from differences in input pin capacitance between the strobe and associ-
ated data pins. This delta only applies between signal groups and their associated strobes: AD_STB1, AD_STB1#=>AD[31::16], and
C/BE[3::2]; AD_STB0, AD_STB0#=>AD[15::00], and C/BE[1::0]#; SB_STB, SB_STB#=>SBA[7::0]. (Complementary strobes apply to
4x mode only.)
52
Electrical Data
Chapter 4