AMD-762 Datasheet, PDF (39/122 Pages) Advanced Micro Devices – System Controller

24416C—December 2001
Preliminary Information
AMD-762™ System Controller Data Sheet
2.6.1
2.6.2
2.6.3
The AMD-762 system controller supports the following power
states :
1. ACPI C0 full-on
2. ACPI C1 Halt
3. ACPI S1 power-on suspend
4. ACPI S3 suspend to RAM
These power states are described in further detail in
subsequent paragraphs.
Full-On (C0)
In this state, the AMD-762 system controller is fully operational,
all clock trees are running, all voltage planes are enabled, and the
AMD-762 system controller provides normal refresh to DRAM.
Halt (C1)
If the AMD-762 system controller detects a Halt special cycle
from either of the processors, the Halt state (C1) is entered and
the Halt special cycle is driven on the PCI bus. No further
activity is required. The processor buses remain connected and
the memory remains in normal refresh mode.
Throttling with STPCLK# Assertion
The AMD-762 system controller supports clock throttling via
assertion of the processor’s STPCLK# pin. If the AMD-762
system controller has detected a Stop Grant special cycle from
the processor, the AMD-762 system controller waits for a Stop
Grant from the second processor (if installed), then the Stop
Grant special cycle is driven on the PCI bus. If the Stop Grant
disconnect bit is set (Dev 0:F0:0x60), when the Stop Grant
special cycle state is received, and there is no probe traffic, the
AMD-762 system controller disconnects the processor and
places system memory into self-refresh mode before passing
the special cycle to the PCI Bus. If the AMD-762 system
controller detects a PCI DMA master transaction that needs a
snoop, then the processors are connected, DRAM is taken out
of self-refresh mode, and the probe cycle(s) are initiated on the
AMD Athlon processor system buses. If the processors do not
start any non-NOP AMD Athlon processor system bus cycles
Chapter 2
Functional Operation
27