AMD-762 Datasheet, PDF (62/122 Pages) Advanced Micro Devices – System Controller

Preliminary Information
AMD-762™ System Controller Data Sheet
24416C—December 2001
4.3.1
Voltage Sequencing Requirements
The preferred sequence of voltages in the AMD-762 system
controller is from highest (5 VDC on the REF_5V pin) to the
lowest. To accommodate the Suspend to RAM feature, it is
expected that the AMD-762 system controller’s 2.5-VDC core
must be powered from the 5-VDC standby voltage from the
standard ATX power supply and therefore is powered up before
the 3.3 VDC, and the AMD-762 system controller can tolerate
this for up to one second.
It is also assumed that the VREF voltages are always powered
from the associated power supply voltage and will therefore lag
behind that voltage. For example, DDR_VREF is powered off
the 2.5 VDC (VDD_CORE), thus comes up after the 2.5 VDC.
The same should apply to AGP_VREF, Px_VREF, etc.
Table 12. DC Characteristics for PCI I/Os*
Symbol
Parameter Description
Condition
Min
Max
Units Notes
V_IH
Input High Voltage
0.5 V_CC
V_CC + 0.5
V
V_IL
Input Low Voltage
—0.5
0.3 V_CC
V
I_IL
Input Leakage Current
0 < V_IN < V_CC
±10
µA
1
V_OH
Output High Voltage
I_OUT = –500 µA 0.9 V_CC
V
V_OL
Output Low Voltage
I_OUT = 1500 µA
0.1 V_CC
V
C_IN
Input Pin Capacitance
10
pF
2
Notes:
* This table contains preliminary information, which is subject to change.
1. Input leakage currents include hi-Z output leakage for all bi-directional buffers with three-state outputs.
2. Absolute maximum pin capacitance for a PCI input is 10 pF (except for CLK) with an exception granted to motherboard-only devices
up to 16 pF in order to accommodate PGA packaging. Generally, this means that components for expansion boards need to use
alternatives to ceramic PGA packaging—that is, PQFP, SGA, etc.
50
Electrical Data
Chapter 4