AK8850 Datasheet, PDF (8/99 Pages) Asahi Kasei Microsystems – NTSC Digital Video Decoder

ASAHI KASEI
70
FBCAP2
71
FBCAP1
72
CLPCAP2
73
CLPCAP1
76
AIN1
80
AIN2
84
AIN3
91
AIN4
93
AIN5
95
AIN6
78
SYNC1
82
SYNC2
86
SYNC3
98
PD
56,75,88
55,57,74,
77,79,81,
83,85,87,
89,90,92,
94,96,96
9,13,17,
21,25,32,
37,42,53
5,10,14,
18, 2,33,
38,43,51
26,27,28,
29,30,44,
45,46,47,
48
1,44,45,
46,47,48,
97,99,
100
AVDD
AVSS
DVDD
DVSS
UD[9:0]
TEST
[AK8850]
O Terminate 0.033uF capacitor between AVSS. (for Clamp Level)
O Terminate 0.033uF capacitor between AVSS. (for Clamp Level)
O Terminate 0.1uF capacitor between AVSS. (for Clamp)
O Terminate 0.1uF capacitor between AVSS. (for Clamp)
I
I
I Analog video signal input pin. The signal should be input through a 0.1uF
I capacitor with -6dB Gain.
I
I
I
I
I
Analog video signal input pin for the internal clamp pulse generator.
This signal should be input through a 0.1uF capacitor with 0dB Gain.
Power Down Control Pin. When this pin becomes High, the AK8850 enters a
I power down state. When returning from power down mode, AK8850 requires
reset sequence.
P Analog power supply (3.3V) pin.
G Analog Ground pin.
P Digital power supply (3.3V) pin.
G Digital Ground pin.
I/O These pins are for test purpose. These pins should be NC.
I These pins are for test purpose. Connect to the DVSS.
Rev.0
8
2002/01