AK8850 Datasheet, PDF (24/99 Pages) Asahi Kasei Microsystems – NTSC Digital Video Decoder

ASAHI KASEI
7. Functional Details
7-1. Analog Signal Processing Block Diagram
FBCAP1
FBCAP2
FBCAP3
CLPCAP1
CLPCAP2
SYNC1
SYNC2
SYNC3
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
EXTCLP
Sync Separaor
(Clamp Pulse
Generator)
MUX
Composite
Y
C/Pb
Pr
CLAMP1
CLAMP2
CLAMP3
PGA1
0.1dB/step
0-12dB
PGA2
0.1dB/step
0-12dB
PGA3
0.1dB/step
0-12dB
CLK
IVCXO
10-bit
ADC1
10-bit
ADC2
10-bit
ADC3
Rev.0
AVDD AVSS
VREF
VRP VCOM VRN VREF IREFR2
24
[AK8850]
CLAMP_PULSE_SEL
LLPF LLPFC FLPFC FLPF
Clock Module
(27MHz Generator
13.5MHz Generator)
CLK Mode Select
CLK27M
CLK13.5M
IRef_R1
Y Data[9:0]
C Data[9:0] / Cb Data[9:0]
Cr Data[9:0]
RESET
PGA_GAIN [6:0] x 3
CLAMP1_LEV [1:0]
INPUT_SEL
From Digital Block
To Digital Block
2002/01