AK8850 Datasheet, PDF (29/99 Pages) Asahi Kasei Microsystems – NTSC Digital Video Decoder

ASAHI KASEI
[AK8850]
( 1-1) SYNC-TIP Clamp Timing Pulse
The Start point and pulse width of the SYNC-TIP timing pulse is set by the [CLAMP TIMING 1 CONTROL REGISTER ].
The Start point of the SYNC-TIP timing pulse is set by [SCLPSTAT 2 : SCLPSTAT 0 ]-bit of the [ CLAMP TIMING 1
CONTROL REGISTER ] as shown below.
The CLAMP period ( pulse width ) is set by [SCLPWIDTH 3 : SCLPWIDTH 0 ]-bit of the [ CLAMP TIMING 1 CONTROL
REGISTER ].
Clamp pulse point and pulse width setting is further described in item( 1-6 )SYNC-SEPARATION RELATED REGISTER
DESCRIPTION.
Input Video Signal
location of Syn
(AIN1/AIN2/AIN3)
After LPF
SYNC1/2/3 input
Sync (HSYNC)
After Syncseparation
Internal Sync Reference
(SYNCDET)
Synctip clamp
Timing pulse
380nsec
70mV (Default
(2 + [SCLPSTAT2:SCLPSTAT0]-bit) Clocks
380nsec + (2 + [SCLPSTAT2:SCLPSTAT0]-bit) Clocks
[SCLPWIDTH3: SCLPWIDTH0]-bit Clocks
R=620
C=510pF
LPF Constance
1Clock = 37nsec
Rev.0
29
2002/01