AK8850 Datasheet, PDF (76/99 Pages) Asahi Kasei Microsystems – NTSC Digital Video Decoder

ASAHI KASEI
[AK8850]
Control 2 Register (R/W) [Sub Address 0x09]
Sub Address 0x09
bit 7
bit 6
bit 5
bit 4
bit 3
CLKMODE1 CLKMODE0
ACC1
ACC0
DPCC1
Default Value
1
1
0
0
0
bit 2
DPCC0
0
Default Value : 0xC1
bit 1
bit 0
DPCT1
DPCT0
0
1
Control 2 Register Definition
BIT Register Name
R/W Definition
Setting of TIme constant of the digital pedestal
clamp.
bit 0
~
DCPT0
~
Digital Pedestal Clamp Timing
DPCT1:DPCT0
00 : digital pedestal clamp OFF
bit 1
DPCT1
bit
R/W _{01 : Fast [Default]}
10 : Middle
11 : Slow
Setting the non-sensing bandwidth of digital
pedestal clamp.
bit 2
~
bit 3
DPCC0
~
DPCC1
Digital Pedestal Clamp Coreing
bit
DPCC1 : DPCC0
00 : No non-sensing bandwidth [Default]
01 : 1bit
10 : 2bits
11 : 3bits
Setting the ACCf function
[ACC1 ACC0] =
bit 4
ACC0
00 : Disable ACC [Default]
~
~
Auto Color Control bits
bit 5
ACC1
01 : Fast [T = 2-Field]
R/W _{10 : Middle}
[T = 8-Field]
11 : Slow [T = 30-Field]
(T : Time constance)
Setting Clock mode
bit 6 CLKMODE0
~
~
Clock Mode bits
bit 7 CLKMODE1
CLKMODE1: CLKMODE0 =
R/W ^{00 : Fixed clock mode(27MHz)}
01 : Line-Locked Clock mode
10 : Frame-Locked Clock mode
11 : Clock mode Auto Select mode [Default]
Rev.0
76
2003/01