AK8850 Datasheet, PDF (27/99 Pages) Asahi Kasei Microsystems – NTSC Digital Video Decoder

ASAHI KASEI
[AK8850]
The input signal path ( input signal setting) is selected by [ INSEL3 : INSEL0 ]-bits ( BIT-3:BIT0) in the [ INPUT SIGNAL
SELECT REGISTER].
The upper 2-bits ( INSEL3 : INSEL2 ) identify Composite /YC and Component signals.
[INSEL3:INSEL0] (bit3:bit0)
Signal Select
[0,0,0,0]
No Signal is selected.
[0,0,0,1]
Composite signal is input from AIN1 (Default)
[0,0,1,0]
Composite signal is input from AIN2
[0,0,1,1]
Composite signal is input from AIN3
[0,1,1,0]
Y-Signal from AIN2
C-Signal from AIN4
[0,1,1,1]
Y-Signal from AIN2
C-Signal from AIN4
[1,0,1,1]
Y-Signal from AIN3 U-Signal from AIN5
V-Signal from AIN6
As shown in the above table ,the AK8850 accepts following 4 input signals:
Composite signal x 3 ch
Composite signal x 2 ch + Y / C input x 1 ch
Composite signal x 1 ch + Y / C input x 2 ch
Composite signal x 1 ch + Y / C input x 1 ch + Component signal x 1 ch
Please refer to item ( 1-6 ) of Section 7-2-2 CLAMP for SYNC 1 / 2 / 3 combinations.
Register settings for the various input signal types are summarized in the following Table 7-2-1-2.
For Black & White signal input, set [ B / W ]-bit to “1”.
NTSC Composite 525Component
Input
Component
Signal
Composite
Y/C
Register
Betacam
MII
bit setting
Setup
No
Setup
Setup
No
Setup
Setup
No
Setup
Setup
No
Setup
[VS3:VS0]-bit
0000 0000 0000 0000
0000
0000
0000
0000
[Setup]-bit
1
0
1
0
1
0
1
0
[NENT]-bit
don’t
care
don’t
care
don’t
care
don’t
care
1
1
0
0
INSEL[3:2]-bit
00
00
01
01
10
10
10
10
Table 7-2-1-2
625-System
Component
No Setup
1111
0
don’t care
10
Rev.0
27
2002/01