AK2401 Datasheet, PDF (12/103 Pages) Asahi Kasei Microsystems – Direct Conversion Transceiver

[AK2401]
9.1. DC Characteristics
9. Digital Characteristics
Parameter
Symbol
Min.
Typ.
Max.
Unit
High Level Input Voltage * 6
V_IH
0.8DVDD
V
Low Level Input Voltage * 6
V_IL
0.2DVDD V
V_IH=DVDD, * 6
High Level Input Current
I_IH1
10
µA
V_IH=DVDD, * 7
I_IH2
16
33
66
µA
Low Level Input Current
V_IL=0V, * 6
I_IL1
-10
µA
V_IL=0V, * 7
I_IL2
-10
µA
High Level Output Voltage * 8
V_OH DVDD-0.4
DVDD
V
Low Level Output Voltage * 8
V_OL
0.0
0.4
V
Notes:
* 6. RSTN, CSN, SDATAI, SCLK, DA_SCLK, DA_SDI, DA_FS, AGC_KEEP, RX_PDN and TX_PDN pins
* 7. TEST1 and TEST2 pins
* 8. SDATAO, LD, AD_SCLK, AD_SDO and AD_FS pins
9.2. System Reset
 Hardware Reset
Parameter
Symbol Min.
Hardware Reset Signal Input Width RSTN pin
t_RSTN
1
Reset operation
Typ.
Max.
Unit
μsec
RSTN pin
t_RSTN
V_IH
V_IL
Figure 3. Hardware Reset
Hardware reset is executed by inputting “L” for 1μsec or longer to the RSTN pin. All internal statuses are
initialized by the hardware reset. Therefore all operational settings should be made after this reset.
For a certain reset of the device, inputs of the SCLK, the SDATAIN and the CSN pins should be fixed to “L”
or “H” during reset and reset release timings. (Recommend) SCLK pin: “L”, SDATAIN pin: “L”, CSN pin:
“H”.
 Software Reset
Software reset is executed by writing <Address:0x5F> SRST[7:0] bits = “10101010”. All internal statuses
except the load data of phase calibration value when shipping that can be read by PFUSE_RDST bit
<Address0x41> are initialized by this reset. Therefore all operational settings should be made after this
reset. SRST[7:0] bits will be set to “00000000” automatically after software reset is completed.
017003093-E-00
12
2017/3