DS891 Datasheet, PDF (6/41 Pages) Xilinx, Inc – Zynq UltraScale+ MPSoC Overview

Zynq UltraScale+ MPSoC Overview
Table 3: Zynq UltraScale+ MPSoC: EG Device Feature Summary
Application Processing Unit
Real-Time Processing Unit
Embedded and External
Memory
General Connectivity
High-Speed Connectivity
Graphic Processing Unit
System Logic Cells
CLB Flip-Flops
CLB LUTs
Distributed RAM (Mb)
Block RAM Blocks
Block RAM (Mb)
UltraRAM Blocks
UltraRAM (Mb)
DSP Slices
CMTs
Max. HP I/O⁽¹⁾
Max. HD I/O⁽²⁾
System Monitor
GTH Transceiver 16.3Gb/s⁽³⁾
GTY Transceivers 32.75Gb/s
Transceiver Fractional PLLs
PCIe Gen3 x16 and Gen4 x8
150G Interlaken
100G Ethernet w/ RS-FEC
ZU2EG
ZU3EG
ZU4EG
ZU5EG
ZU6EG
ZU7EG
ZU9EG
ZU11EG ZU15EG ZU17EG ZU19EG
Quad-core ARM Cortex-A53 MPCore with CoreSight; NEON & Single/Double Precision Floating Point; 32KB/32KB L1 Cache, 1MB L2 Cache
Dual-core ARM Cortex-R5 with CoreSight; Single/Double Precision Floating Point; 32KB/32KB L1 Cache, and TCM
256KB On-Chip Memory w/ECC; External DDR4; DDR3; DDR3L; LPDDR4; LPDDR3;
External Quad-SPI; NAND; eMMC
214 PS I/O; UART; CAN; USB 2.0; I2C; SPI; 32b GPIO; Real Time Clock; WatchDog Timers; Triple Timer Counters
4 PS-GTR; PCIe Gen1/2; Serial ATA 3.1; DisplayPort 1.2a; USB 3.0; SGMII
ARM Mali™-400 MP2; 64KB L2 Cache
103,320
154,350
192,150
256,200
469,446
504,000
599,550
653,100
746,550
926,194 1,143,450
94,464
141,120
175,680
234,240
429,208
460,800
548,160
597,120
682,560
846,806 1,045,440
47,232
70,560
87,840
117,120
214,604
230,400
274,080
298,560
341,280
423,403
522,720
1.2
1.8
2.6
3.5
6.9
6.2
8.8
9.1
11.3
8.0
9.8
150
216
128
144
714
312
912
600
744
796
984
5.3
7.6
4.5
5.1
25.1
11.0
32.1
21.1
26.2
28.0
34.6
0
0
48
64
0
96
0
80
112
102
128
0
0
14.0
18.0
0
27.0
0
22.5
31.5
28.7
36.0
240
360
728
1,056
1,973
1,728
2,520
2,928
3,528
1,590
1,968
3
3
4
4
4
8
4
8
4
11
11
156
156
156
156
208
416
208
416
208
572
572
96
96
96
96
120
48
120
96
120
96
96
2
2
2
2
2
2
2
2
2
2
2
0
0
16
16
24
24
24
32
24
44
44
0
0
0
0
0
0
0
16
0
28
28
0
0
8
8
12
12
12
24
12
36
36
0
0
2
2
0
2
0
4
0
4
5
0
0
0
0
0
0
0
1
0
2
4
0
0
0
0
0
0
0
2
0
2
4
Notes:
1. HP = High-performance I/O with support for I/O voltage from 1.0V to 1.8V.
2. HD = High-density I/O with support for I/O voltage from 1.2V to 3.3V.
3. GTH transceivers in the SFVC784 package support data rates up to 12.5Gb/s. See Table 4.
DS891 (v1.3) September 23, 2016
www.xilinx.com
Advance Product Specification
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