TLK111_14 Datasheet, PDF (93/110 Pages) Texas Instruments – PHYTER® Industrial Temperature 10/100Mbs Ethernet Physical Layer Transceiver

TLK111
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9.9.9 100Base-TX / FX Receive Packet Latency Timing
SLLSEF8B – AUGUST 2013 – REVISED JANUARY 2014
Table 9-9. 100Base-TX / FX Receive Packet Latency Timing
PARAMETER
TEST CONDITIONS⁽¹⁾
MIN TYP MAX UNIT⁽²⁾
t₁
Carrier Sense ON Delay⁽³⁾
100Mbs Normal mode
14
100Mbs Fiber mode
7.2
t₂
Receive Data Latency
100Mbs Normal mode
100Mbs Fiber mode
19
12.2
bits
t₂
Receive Data Latency⁽⁴⁾
100Mbs normal mode with fast
RXDV detection ON
15
100Mbs Fiber mode
8.2
(1) PMD Input Pair voltage amplitude is greater than the Signal Detect Turn-On Threshold Value.
(2) 1 bit time = 10 ns in 100Mbs mode
(3) Carrier Sense On Delay is determined by measuring the time from the first bit of the “J” code group to the assertion of Carrier Sense.
(4) Fast RXDV detection could be enabled by setting bit[1] of SWSCR1 (address 0x0009).
PMD Input Pair IDLE
(J/K)
Data
CRS
RXD[3:0]
RX_DV
RX_ER
t₁
t₂
Figure 9-9. 100Base-TX / FX Receive Packet Latency Timing
T0346-01
9.9.10 100Base-TX / FX Receive Packet Deassertion Timing
Table 9-10. 100Base-TX / FX Receive Packet Deassertion Timing
PARAMETER
t₁
Carrier Sense OFF Delay⁽¹⁾
TEST CONDITIONS
100Mbs Normal mode
100Mbs Fiber mode
MIN TYP MAX UNIT
19
11.2
bits ⁽²⁾
(1) Carrier Sense Off Delay is determined by measuring the time from the first bit of the “T” code group to the deassertion of Carrier Sense.
(2) 1 bit time = 10 ns in 100Mbs mode
PMD Input Pair DATA
(T/R)
IDLE
t₁
CRS
T0347-01
Figure 9-10. 100Base-TX / FX Receive Packet Deassertion Timing
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