TLK111_14 Datasheet, PDF(75/110 Page) Texas Instruments – PHYTER® Industrial Temperature 10/100Mbs Ethernet Physical Layer Transceiver

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TLK111_14 Datasheet, PDF (75/110 Pages) Texas Instruments – PHYTER® Industrial Temperature 10/100Mbs Ethernet Physical Layer Transceiver

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TLK111

www.ti.com

SLLSEF8B â AUGUST 2013 â REVISED JANUARY 2014

8.3 PHY Reset Control Register (PHYRCR)

Table 8-33. PHY Reset Control Register (PHYRCR), address 0x001F

BIT NAME

DEFAULT

15 Software Reset 0, RW,SC

14 Software

Restart

13:0 RESERVED

0, RW,SC

00 0000 0000

0000, RO

FUNCTION

Software Reset:

1 = Reset PHY. This bit is self cleared and has same effect as Hardware reset pin.

0 = Normal Operation

Software Restart:

1 = Reset PHY. This bit is self cleared and resets all PHY circuitry except the registers.

0 = Normal Operation

Writes ignored, read as 0

8.4 Multi LED Control register (MLEDCR)

Table 8-34. Multi LED Control register (MLEDCR), address 0x0025

BIT

15:11

NAME

RESERVED

MLED pin 42

Route & Enable

(COL Disable)

MLED Polarity

RW Strap

DEFAULT

0000 0, RO

1, RW

RW, Strap

8:7 RESERVED

0 0, RW, SC

6:3 MLED

000 0, RW

Configuration

2:1 MLED pin

00, RW

Routing Config

MLED pin

0, RW

Routing enable

FUNCTION

Writes ignored, read as 0

Disable collision pin, and enable and route MLED (Multi LED) output to pin 42

Default - LINK advertise, LED_CFG strap can change to LINK+ACT

The polarity of MLED depends on the routing configuration and the strap in use on the

selected pin. If the pin is (strap) PU then polarity is low, if the pin is (strap) PD then polarity

is high.

RESERVED

0000 = Link OK

0001 = RX/TX Activity

0010 = TX Activity

0011 = RX Activity

0100 = Collision

0101 = Speed: High for 100 Base TX

0110 = Speed: High for 10 Base TX

0111 = Full Duplex

1000 = Link OK / Blink on TX/RX Activity

1001 = Active Stretch Signal

1010 = MII LINK (100BT+FD)

Select between 3 current LEDs, only when 'MLED pin Routing Enable' bit is enabled

00 - LED LINK

01 - LED SPEED

10 - LED ACT

11 - LED LINK (Like DFLT)

Enable routing for MLED according to MLED pin routing config

8.5 IEEE1588 Precision Timing Pin Select (PTPPSEL)

This register configures the .

Table 8-35. IEEE1588 Precision Timing Pin Select (PTPPSEL), address 0x003E

BIT

BIT NAME

15:7 RESERVED

DEFAULT

<0000 0>,

DESCRIPTION

RESERVED: Writes ignored, read as 0.

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