TLK111_14 Datasheet, PDF (50/110 Pages) Texas Instruments – PHYTER® Industrial Temperature 10/100Mbs Ethernet Physical Layer Transceiver

TLK111
SLLSEF8B – AUGUST 2013 – REVISED JANUARY 2014
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8.1 Register Definition
In the register definitions under the ‘Default’ heading, the following definitions hold true:
• COR = Clear on Read
• Pin_Strap = Default value loads from strapping pin after reset
• LH = Latched High and held until read, based upon the occurrence of the corresponding event
• LL = Latched Low and held until read, based upon the occurrence of the corresponding event
• RO = Read Only access
• RO/COR = Read Only, Clear on Read
• RO/P = Read Only, Permanently set to a default value
• RW = Read Write access
• RW/SC = Read Write Access/Self Clearing bit
• SC = Register sets on event occurrence and Self-Clears when event ends
• SWSC_Strap = Default value loads from SWSC strapping bit
• SWS = Software Strap bit: Bit is always accessible. When written during soft strap mode, latches value
after applying Config Done; acts as Default during functional mode (until next HW Reset). Otherwise,
latches bit content regularly as RW.
• SWSC = Software Strap config - Bit is accessible only at Software strap mode, value of bit is latched
after applying Config Done as default to the destination bit. During functional mode the bit is not
accessible. The SWSC duplicate external pin strap option, in this case SWSC has higher priority than
the pin Configuration. SWSC default value will come from the corresponding pin Configuration
8.1.1 Basic Mode Control Register (BMCR)
Table 8-4. Basic Mode Control Register (BMCR), address 0x0000
BIT
BIT NAME
15 Reset
DEFAULT
0, RW/SC
DESCRIPTION
PHY Software Reset:
1 = Initiate software Reset / Reset in Process
0 = Normal operation
14 MII Loopback
13 Speed Selection
12 Auto-Negotiation
Enable
0, RW
1, Pin_Strap,
SWSC_Strap,
RW
1, Pin_Strap,
SWSC_Strap,
RW
Writing a 1 to this bit resets the PHY. When the reset operation is done, this bit is cleared to
0 automatically. The configuration is relatched.
MII Loopback:
1 = MII Loopback enabled
0 = Normal operation
When MII loopback mode is activated, the transmitter data presented on MII TXD is looped
back to MII RXD internally.
Speed Select:
When auto-negotiation is disabled writing to this bit allows the port speed to be selected.
1 = 100Mbs
0 = 10Mbs
Auto-Negotiation Enable:
Configuration pin (jumper) controls initial value at reset.
1 = Auto-Negotiation Enabled – bits 8 and 13 of this register are ignored when this bit is
set.
0 = Auto-Negotiation Disabled – bits 8 and 13 determine the port speed and duplex
mode.
50
Register Block
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