TLK111_14 Datasheet, PDF (37/110 Pages) Texas Instruments – PHYTER® Industrial Temperature 10/100Mbs Ethernet Physical Layer Transceiver

TLK111
www.ti.com
SLLSEF8B – AUGUST 2013 – REVISED JANUARY 2014
The Fast Link Down functionality allows the use of each of these options separately or in any combination.
Note that since this mode enables extremely quick reaction time, it is more exposed to temporary bad link-
quality scenarios.
5.6 100BaseX Fiber Mode
The TLK111 supports 100BaseX fiber mode. Configure the device for fiber mode using register 0x000A,
bit [14]. The PHY also supports FEF transmission and detection. In 100BASE-FX mode, the device
Transmit pins connect to an industry standard Fiber Transceiver with PECL signaling through a
capacitively-coupled circuit. In FX mode, on the TX path, the device bypasses the Scrambler and the
MLT3 encoder, enabling the transmission of serialized 5B4B encoded NRZI data at 125 MHz. On the RX
path, the device bypasses the MLT3 Decoder and the Descrambler, enabling the reception of serialized
5B4B encoded NRZI data at 125 MHz. The only added functionality in the aspect of data transmission for
100BASE-FX from 100BASE-TX is the support of Far-End Fault detection and transmission.
5.6.1 Signal Detect
The signal-detect function in fiber mode notifies the PHY that the optic transceiver has identified valid optic
communications in the far end optic. There are several options to implement the required signal-detect
functionality.
1. Default – use the SD_IN pin, based on PECL signaling (pin 27). The SD_IN pin works only at VDD_IO
= 3.3V.
2. Auto SD_IN detection – The PHY detects through the PMD connection to the optic transceiver if there
PECL communication exists with the optic transceiver, internally indicating to the PHY the SD_IN
status (configured in FIBCR2 reg 0x00FD). This mode requires that when SD_IN is low, the optic
transceiver is not transmitting PECL signaling to the PHY. This is the case with the recommended optic
transceiver for the TLK111. (See the TLK Design Guidelines SLVA531A).
3. Manual SD_IN – the user can manually control the SD_IN functionality, establishing the link when
SD_IN is manually asserted high. This option is recommended for networks were the fibers are already
deployed and the SD_IN functionality is not required. (Configured in FIBCR3, reg 0x0102).
5.6.2 Far-End Fault (FEF) Mechanism
Because 100BASE-FX does not support Auto-Negotiation, a Far-End Fault facility is included which allows
detection and transmission of link failures. When no signal is being received as determined by the Signal
Detect function, the device sends a Far-End Fault indication to the far-end peer. The Far-End Fault
indication detects repeating cycles, each consisting of 84 ones followed by a single zero. The pattern is
such that it will not satisfy the 100BASE-FX carrier sense mechanism, but is easily detected as the Fault
indication. The pattern will be transparent to devices that do not support Far-End Fault.
The Far-End Fault detection process continuously monitors the receive data stream for the Far-End Fault
indication. When detected, the Link Monitor is forced to de-assert Link status, causing the device to begin
transmitting Far-End fault signaling to the far-end peer.
5.7 IEEE 1588 Precision Timing Protocol Support
The TLK111supports an IEEE 1588 indication pulse at the SFD (start frame delimiter) for the RX and TX
paths in 100BT mode. The pulse can be delivered to various pins as configured by register 0x3e. The
pulse indicates the actual time the symbol is presented on the lines (for TX), or the first bit where the /J/
symbol is received (RX). Exact timing of the pulse can be adjusted using register 0x3f. Each increment of
phase value is an 8ns step.
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