TLK111_14 Datasheet, PDF (14/110 Pages) Texas Instruments – PHYTER® Industrial Temperature 10/100Mbs Ethernet Physical Layer Transceiver

TLK111
SLLSEF8B – AUGUST 2013 – REVISED JANUARY 2014
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3.7 MII Isolate Mode
The TLK111 can be put into MII-Isolate mode by writing bit 10 of the BMCR register.
When in the MII-Isolate mode, the TLK111 ignores packet data present at the TXD[3:0], TX_EN inputs,
and presents a high impedance on the TX_CLK, RX_CLK, RX_DV, RX_ER, RXD[3:0], COL, and CRS
outputs. When in isolate mode, the TLK111 continues to respond to all management transactions.
When in isolate mode, the PMD output pair does not transmit packet data, but continues to source
100Base-TX scrambled idles or 10Base-T normal link pulses. The TLK111 can auto-negotiate or parallel
detect on the receive signal at the PMD input pair. A valid link can be established for the receiver even
when the TLK111 is in Isolate mode.
3.8 Software Strapping Mode
The TLK111 provides a mechanism to extend the number of configuration pins to allow wider system
programmability of PHY functions.
Connecting an external pull-down to pin 21 causes the device to enter SW Strapping Mode after power-up
or a hardware reset event. In this mode the device wakes up after power-up/hardware reset in power
down mode. While in power down (in SW strap mode only) the PHY allows the system processor to
access the dedicated Strapping Registers and configure modes of operation. Once the dedicated
Strapping Registers are programmed, setting the SW Strapping Mode Release register bit (“Configuration
done”), bit 15 of register SWSCR1(0x0009), must be done in order to take the device out of power-down
mode. An internal reset pulse is generated and the SW Strap Register values are latched into internal
registers. Unless a new Power-up/HW reset was applied, the configured SW Strap Register values will
function as default values. Generation of Software Reset/Software Restart - bits 15 and 14 of register
PHYRCR (0x001F) will not clear the configured SW Strap bit values.
There are 3 Software Strapping control registers: SWSCR1 (0x0009), SWSCR2 (0x000A) and
SWSCR3(0x000B) contain the configuration bits used as strapping options or virtual strapping pins during
HW Reset or Power-Up.
The TLK111 Software Strap mechanism behavior is shown in Figure 3-4.
14
Hardware Configuration
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