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TLK111_14 Datasheet, PDF (9/110 Pages) Texas Instruments – PHYTER® Industrial Temperature 10/100Mbs Ethernet Physical Layer Transceiver
TLK111
www.ti.com
SLLSEF8B – AUGUST 2013 – REVISED JANUARY 2014
PIN
NAME
TYPE
NO.
DESCRIPTION
AN_EN: A high level on this pin puts the part into advertised Auto-Negotiation mode with the
capability set by AN_0 and AN_1 pins. A low level on AN_EN puts the part into Forced Mode with
the capability set by AN_0 and AN_1 pins.
AN_0, AN_1: These input pins control the forced or advertised operating mode according to the
following table. The value on these pins is set by connecting the input pins to GND (0) or VCC (1)
through 2.2kΩ resistors. DO NOT connect these pins directly to GND or VCC.
The states of these pins are latched into the Basic Mode Control Register and the
Auto_Negotiation Advertisement Register during Hardware-Reset.
The default is 111 because these pins have internal pull-ups.
AN_EN
(LED_ACT)
26
AN_1
27 S, O, PU
(LED_SPEED)
28
AN_0 (LED_LINK)
AN_EN
0
0
0
0
AN_EN
1
1
1
1
AN_1
0
0
1
1
AN_1
0
0
1
1
AN_0
0
1
0
1
AN_0
0
1
0
1
Forced Mode
10Base-T, Half-Duplex
10Base-T, Full-Duplex
100Base-TX, Half-Duplex
100Base-TX, Full-Duplex
Advertised Mode
10Base-T, Half or Full-Duplex
100Base-TX, Half or Full-Duplex
10Base-T, Half-Duplex
100Base-TX, Half-Duplex
10Base-T, Half orFull-Duplex
100Base-TX, Half or Full-Duplex
LED_CFG (CRS)
AMDIX_EN
(RX_ER)
MII_MODE
(RX_DV)
LED Configuration: This option, along with the LEDCR register bit, selects the mode of
40 S, O, PU operation of the LED pins. Default is Mode 1. All modes are also configurable via register access.
See PHY Control Register (PHYCR), Address 0x0019
41
S, O, PU
Auto-MDIX Enable: This option sets the Auto-MDIX mode. By default, it enables Auto-MDIX. An
external pull-down resistor disables Auto-MDIX mode.
MII Mode Select: This option selects the operating mode of the MAC data interface. This pin has
39 S, O, PD a weak internal pull-down, and it defaults to normal MII operation mode. An external pull-up
causes the device to operate in RMII mode.
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Hardware Configuration
9