TLK111_14 Datasheet, PDF (51/110 Pages) Texas Instruments – PHYTER® Industrial Temperature 10/100Mbs Ethernet Physical Layer Transceiver

TLK111
www.ti.com
SLLSEF8B – AUGUST 2013 – REVISED JANUARY 2014
Table 8-4. Basic Mode Control Register (BMCR), address 0x0000 (continued)
BIT
BIT NAME
11 IEEE Power
Down
10 Isolate
9 Restart Auto-
Negotiation
8 Duplex Mode
7 Collision Test
6:0 RESERVED
DEFAULT
0, RW
0, RW
0, RW/SC
1, Pin_Strap,
SWSC_Strap,
RW
led control
0, RW
0, RO
DESCRIPTION
Power Down:
1 = Enables IEEE power down mode
0 = Normal operation
Setting this bit powers down the PHY. Only minimal register functionality is enabled during
the power down condition. To control the power down mechanism, this bit is ORed with the
input from the INT/PWDN pin. When the active low INT/PWDN is asserted, this bit is set.
Isolate:
1 = Isolates the Port from the MII with the exception of the serial management
0 = Normal operation
Restart Auto-Negotiation:
1 = Restart Auto-Negotiation. Re-initiates the Auto-Negotiation process. If Auto-
Negotiation is disabled (bit 12 = 0), this bit is ignored. This bit is self-clearing and will
return a value of 1 until Auto-Negotiation is initiated, whereupon it will self-clear.
Operation of the Auto-Negotiation process is not affected by the management entity
clearing this bit.
0 = Normal operation
Re-initiates the Auto-Negotiation process. If Auto-Negotiation is disabled (bit 12 = 0), this bit
is ignored. This bit is self-clearing and will return a value of 1 until Auto-Negotiation is
initiated, whereupon it self-clears. Operation of the Auto-Negotiation process is not affected
by the management entity clearing this bit.
Duplex Mode:
When auto-negotiation is disabled writing to this bit allows the port Duplex capability to be
selected.
1 = Full Duplex operation
0 = Half Duplex operation
Collision Test:
1 = Collision test enabled
0 = Normal operation
When set, this bit causes the COL signal to be asserted in response to the assertion of
TX_EN within 512 bit times. The COL signal is de-asserted within 4 bit times in response to
the de-assertion of TX_EN.
RESERVED: Write ignored, read as 0.
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