LM3S101 Datasheet, PDF (67/445 Pages) List of Unclassifed Manufacturers – Microcontroller

Stellaris^® LM3S101 Microcontroller
2.5.3
2.5.4
Table 2-9. Interrupts (continued)
Vector Number
43
44
45
Interrupt Number (Bit
in Interrupt Registers)
27
28
29
Vector Address or
Offset
-
0x0000.00B0
0x0000.00B4
Description
Reserved
System Control
Flash Memory Control
Exception Handlers
The processor handles exceptions using:
■ Interrupt Service Routines (ISRs). Interrupts (IRQx) are the exceptions handled by ISRs.
■ Fault Handlers. Hard fault, memory management fault, usage fault, and bus fault are fault
exceptions handled by the fault handlers.
■ System Handlers. NMI, PendSV, SVCall, SysTick, and the fault exceptions are all system
exceptions that are handled by system handlers.
Vector Table
The vector table contains the reset value of the stack pointer and the start addresses, also called
exception vectors, for all exception handlers. The vector table is constructed using the vector address
or offset shown in Table 2-8 on page 66. Figure 2-6 on page 68 shows the order of the exception
vectors in the vector table. The least-significant bit of each vector must be 1, indicating that the
exception handler is Thumb code
July 14, 2014
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Texas Instruments-Production Data