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LM3S101 Datasheet, PDF (207/445 Pages) List of Unclassifed Manufacturers – Microcontroller
Stellaris® LM3S101 Microcontroller
Table 7-6. GPIO Pad Configuration Examples (continued)
Configuration
GPIO Register Bit Valuea
AFSEL DIR
ODR
Digital Input/Output
1
X
0
(UART)
Analog Input
(Comparator)
0
0
0
Digital Output
(Comparator)
1
X
0
a. X=Ignored (don’t care bit)
DEN
1
0
1
PUR
?
0
?
?=Can be either 0 or 1, depending on the configuration
PDR
?
0
?
DR2R
?
X
?
DR4R
?
X
?
DR8R
?
X
?
SLR
?
X
?
Table 7-7. GPIO Interrupt Configuration Example
Desired
Pin 2 Bit Valuea
Register
Interrupt
Event
7
6
5
4
Trigger
GPIOIS
0=edge
X
X
X
X
1=level
GPIOIBE
0=single
X
X
X
X
edge
1=both
edges
GPIOIEV 0=Low level,
X
X
X
X
or negative
edge
1=High level,
or positive
edge
GPIOIM
0=masked
0
0
0
0
1=not
masked
a. X=Ignored (don’t care bit)
3
X
X
X
0
2
0
0
1
1
1
X
X
X
0
0
X
X
X
0
7.5 Register Map
Table 7-8 on page 208 lists the GPIO registers. The offset listed is a hexadecimal increment to the
register’s address, relative to that GPIO port’s base address:
■ GPIO Port A: 0x4000.4000
■ GPIO Port B: 0x4000.5000
■ GPIO Port C: 0x4000.6000
Note that the GPIO module clock must be enabled before the registers can be programmed (see
page 175). There must be a delay of 3 system clocks after the GPIO module clock is enabled before
any GPIO module registers are accessed.
Important: The GPIO registers in this chapter are duplicated in each GPIO block; however,
depending on the block, all eight bits may not be connected to a GPIO pad. In those
cases, writing to those unconnected bits has no effect, and reading those unconnected
bits returns no meaningful data.
July 14, 2014
207
Texas Instruments-Production Data