LM3S101 Datasheet, PDF (26/445 Pages) List of Unclassifed Manufacturers – Microcontroller

Architectural Overview
• User-managed flash data programming
• User-defined and managed flash-protection block
– 2 KB single-cycle SRAM
■ GPIOs
– 2-18 GPIOs, depending on configuration
– 5-V-tolerant in input configuration
– Fast toggle capable of a change every two clock cycles
– Programmable control for GPIO interrupts
• Interrupt generation masking
• Edge-triggered on rising, falling, or both
• Level-sensitive on High or Low values
– Bit masking in both read and write operations through address lines
– Pins configured as digital inputs are Schmitt-triggered.
– Programmable control for GPIO pad configuration
• Weak pull-up or pull-down resistors
• 2-mA, 4-mA, and 8-mA pad drive for digital communication
• Slew rate control for the 8-mA drive
• Open drain enables
• Digital input enables
■ General-Purpose Timers
– Two General-Purpose Timer Modules (GPTM), each of which provides two 16-bit
timers/counters. Each GPTM can be configured to operate independently:
• As a single 32-bit timer
• As one 32-bit Real-Time Clock (RTC) to event capture
• For Pulse Width Modulation (PWM)
– 32-bit Timer modes
• Programmable one-shot timer
• Programmable periodic timer
• Real-Time Clock when using an external 32.768-KHz clock as the input
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July 14, 2014
Texas Instruments-Production Data