LM3S101 Datasheet, PDF (200/445 Pages) List of Unclassifed Manufacturers – Microcontroller

General-Purpose Input/Outputs (GPIOs)
7.1 Block Diagram
Figure 7-1. GPIO Module Block Diagram
PA0
U0Rx
UART0
PA1
U0Tx
PA2
SSIClk
PA3
SSIFss
PA4
SSIRx
SSI
PA5
SSITx
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
PC3
CCP0
32KHz
Timer 0
Timer 1
C0-
C0o/C1-
C0+
Analog
Comparators
TCK/SWCLK
TMS/SWDIO
TDI
TDO/SWO
TRST
JTAG
7.2 Signal Description
GPIO signals have alternate hardware functions. Table 7-4 on page 202 and Table 7-5 on page 202
list the GPIO pins and their digital alternate functions. Other analog signals are 5-V tolerant and are
connected directly to their circuitry (C0-, C0+, C1-, C1+). These signals are configured by clearing
the DEN bit in the GPIO Digital Enable (GPIODEN) register. The digital alternate hardware functions
are enabled by setting the appropriate bit in the GPIO Alternate Function Select (GPIOAFSEL)
and GPIODEN registers and configuring the PMCx bit field in the GPIO Port Control (GPIOPCTL)
register to the numeric enoding shown in the table below. Note that each pin must be programmed
individually; no type of grouping is implied by the columns in the table.
Important: All GPIO pins are configured as GPIOs and tri-stated by default (GPIOAFSEL=0,
GPIODEN=0, GPIOPDR=0, GPIOPUR=0, and GPIOPCTL=0, with the exception of the
200
July 14, 2014
Texas Instruments-Production Data