LM3S101 Datasheet, PDF (134/445 Pages) List of Unclassifed Manufacturers – Microcontroller

System Control
5.2.2.3
The Power-On Reset sequence is as follows:
1. The microcontroller waits for internal POR to go inactive.
2. The internal reset is released and the core loads from memory the initial stack pointer, the initial
program counter, and the first instruction designated by the program counter, and then begins
execution.
The internal POR is only active on the initial power-up of the microcontroller. The Power-On Reset
timing is shown in Figure 16-6 on page 411.
External RST Pin
Note: It is recommended that the trace for the RST signal must be kept as short as possible. Be
sure to place any components connected to the RST signal as close to the microcontroller
as possible.
If the application only uses the internal POR circuit, the RST input must be connected to the power
supply (V_DD) through an optional pull-up resistor (0 to 100K Ω) as shown in Figure 5-1 on page 134.
Figure 5-1. Basic RST Configuration
VDD
Stellaris®
R_PU
RST
R_PU = 0 to 100 kΩ
The external reset pin (RST) resets the microcontroller including the core and all the on-chip
peripherals except the JTAG TAP controller (see “JTAG Interface” on page 121). The external reset
sequence is as follows:
1. The external reset pin (RST) is asserted for the duration specified by T_MIN and then de-asserted
(see “Reset” on page 410).
2. The internal reset is released and the core loads from memory the initial stack pointer, the initial
program counter, and the first instruction designated by the program counter, and then begins
execution.
To improve noise immunity and/or to delay reset at power up, the RST input may be connected to
an RC network as shown in Figure 5-2 on page 135.
134
July 14, 2014
Texas Instruments-Production Data