English
Language : 

LM3S101 Datasheet, PDF (18/445 Pages) List of Unclassifed Manufacturers – Microcontroller
Revision History
Table 1. Revision History (continued)
Date
January 2011
Revision
9102
Description
■ In Application Interrupt and Reset Control (APINT) register, changed bit name from SYSRESETREQ
to SYSRESREQ.
■ Added DEBUG (Debug Priority) bit field to System Handler Priority 3 (SYSPRI3) register.
■ Added missing bit MMARV to the Configurable Fault Status (FAULTSTAT) register.
■ Added "Reset Sources" table to System Control chapter.
■ Removed mention of false-start bit detection in the UART chapter. This feature is not supported.
■ Added note that specific module clocks must be enabled before that module's registers can be
programmed. There must be a delay of 3 system clocks after the module clock is enabled before
any of that module's registers are accessed.
■ Added specification for maximum input voltage on a non-power pin when the microcontroller is
unpowered (VNON parameter in Maximum Ratings table).
■ Additional minor data sheet clarifications and corrections.
September 2010
7783
■ Reorganized ARM Cortex-M3 Processor Core, Memory Map and Interrupts chapters, creating two
new chapters, The Cortex-M3 Processor and Cortex-M3 Peripherals. Much additional content was
added, including all the Cortex-M3 registers.
■ Changed register names to be consistent with StellarisWare® names: the Cortex-M3 Interrupt
Control and Status (ICSR) register to the Interrupt Control and State (INTCTRL) register, and
the Cortex-M3 Interrupt Set Enable (SETNA) register to the Interrupt 0-31 Set Enable (EN0)
register.
■ Added clarification of instruction execution during Flash operations.
■ Modified Figure 7-2 on page 204 to clarify operation of the GPIO inputs when used as an alternate
function.
■ Added caution not to apply a Low value to PB7 when debugging; a Low value on the pin causes
the JTAG controller to be reset, resulting in a loss of JTAG communication.
■ In General-Purpose Timers chapter, clarified operation of the 32-bit RTC mode.
■ Added missing table "Connections for Unused Signals" (Table 14-9 on page 403).
■ In Electrical Characteristics chapter:
– Added ILKG parameter (GPIO input leakage current) to Table 16-4 on page 406.
– Corrected values for tCLKRF parameter (SSIClk rise/fall time) in Table 16-13 on page 413.
■ Added dimensions for Tray and Tape and Reel shipping mediums.
June 2010
7393
■ Corrected base address for SRAM in architectural overview chapter.
■ Clarified system clock operation, adding content to “Clock Control” on page 137.
■ In Signal Tables chapter, added table "Connections for Unused Signals."
■ In "Reset Characteristics" table, corrected value for supply voltage (VDD) rise time.
■ Additional minor data sheet clarifications and corrections.
18
July 14, 2014
Texas Instruments-Production Data