SM320F28335PTPMEP Datasheet, PDF (98/167 Pages) Texas Instruments – Digital Signal Controller (DSC)

SM320F28335-EP
SPRS581D – JUNE 2009 – REVISED MAY 2012
16-bits
CS
A(19:1)
A(0)
OE
WE
D(15:0)
External
wait-state
generator
XINTF
XREADY
XCLKOUT
XZCS0/6/7
XA(19:1)
XA0/XWE1
XRD
XWE0
XD(15:0)
Figure 4-21. Typical 16-bit Data Bus XINTF Connections
Low 16-bits
External
wait-state
generator
XINTF
XREADY
XCLKOUT
CS
A(18:0)
OE
WE
D(15:0)
XA(19:1)
XRD
XWE0
XD(15:0)
High 16-bits
A(18:0)
CS
OE
WE
D(31:16)
XZCS0/6/7
XA0/XWE1
(select XWE1)
XD(31:16)
Figure 4-22. Typical 32-bit Data Bus XINTF Connections
Table 4-19. XINTF Configuration and Control Register Mapping
NAME
ADDRESS
SIZE (x16)
DESCRIPTION
XTIMING0
XTIMING6 ⁽¹⁾
0x00−0B20
0x00−0B2C
2
XINTF Timing Register, Zone 0
2
XINTF Timing Register, Zone 6
XTIMING7
XINTCNF2 ⁽²⁾
0x00−0B2E
0x00−0B34
2
XINTF Timing Register, Zone 7
2
XINTF Configuration Register
XBANK
0x00−0B38
1
XINTF Bank Control Register
XREVISION
0x00−0B3A
1
XINTF Revision Register
XRESET
0x00 083D
1
XINTF Reset Register
(1) XTIMING1 - XTIMING5 are reserved for future expansion and are not currently used.
(2) XINTCNF1 is reserved and not currently used.
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Peripherals
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