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SM320F28335PTPMEP Datasheet, PDF (132/167 Pages) Texas Instruments – Digital Signal Controller (DSC) | |||
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SM320F28335-EP
SPRS581D â JUNE 2009 â REVISED MAY 2012
www.ti.com
These requirements result in the following XTIMING register configuration restrictions :
XRDLEAD
XRDACTIVE
XRDTRAIL
XWRLEAD
XWRACTIVE
XWRTRAIL
â¥1
â¥2
0
â¥1
â¥2
0
X2TIMING
0, 1
or
XRDLEAD
â¥2
XRDACTIVE
â¥1
XRDTRAIL
0
XWRLEAD
â¥2
XWRACTIVE
â¥1
XWRTRAIL
0
X2TIMING
0, 1
Examples of valid and invalid timing when using asynchronous XREADY:
XRDLEAD XRDACTIVE XRDTRAIL
XWRLEAD XWRACTIVE
Invalid (1)
0
0
0
0
0
Invalid (1)
1
0
0
1
0
Invalid (1)
1
1
0
1
1
Valid
1
1
0
1
1
Valid
1
2
0
1
2
Valid
2
1
0
2
1
(1) No hardware to detect illegal XTIMING configurations
XWRTRAIL
0
0
0
0
0
0
X2TIMING
0, 1
0, 1
0
1
0, 1
0, 1
Unless otherwise specified, all XINTF timing is applicable for the clock configurations shown in Table 6-36.
132 Electrical Specifications
Copyright © 2009â2012, Texas Instruments Incorporated
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