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SM320F28335PTPMEP Datasheet, PDF (33/167 Pages) Texas Instruments – Digital Signal Controller (DSC)
SM320F28335-EP
www.ti.com
Block
Start Address
On-Chip Memory
SPRS581D – JUNE 2009 – REVISED MAY 2012
External Memory XINTF
Data Space
Prog Space
0x00 0000
0x00 0040
0x00 0400
0x00 0800
M0 Vector - RAM (32 x 32)
(Enable if VMAP = 0)
M0 SARAM (1K x 16)
M1 SARAM (1K x 16)
Peripheral Frame 0
0x00 0D00
0x00 0E00
0x00 2000
0x00 5000
0x00 6000
0x00 7000
PIE Vector - RAM
(256 x16)
(Enabled if
VMAP = 1,
ENPIE =1)
Peripheral Frame 0
Reserved
Peripheral Frame 3
(Protected) DMA Accessible
Peripheral Frame 1
(Protected)
Peripheral Frame 2
(Protected)
Reserved
Reserved
0x00 8000
0x00 9000
0x00 A000
0x00 B000
0x00 C000
0x00 D000
0x00 E000
0x00 F000
0x01 0000
L0 SARAM (4K x16, Secure Zone Dual Mapped)
L1 SARAM (4K x 16, Secure Zone Dual Mapped)
L2 SARAM (4Kx16, Secure Zone, Dual Mapped)
L3 SARAM (4Kx16, Secure Zone, Dual Mapped)
L4 SARAM (4Kx16, DMA Accessible)
L5 SARAM (4Kx16, DMA Accessible)
L6 SARAM (4Kx16, DMA Accessible)
L7 SARAM (4Kx16, DMA Accessible)
Reserved
0x30 0000
0x33 FFF8
0x34 0000
0x38 0080
0x38 0090
0x38 0400
0x38 0800
0x3F 8000
0x3F 9000
0x3F A000
0x3F B000
0x3F C000
0x3F E000
0x3F FFC0
FLASH (256 K x 16, Secure Zone)
128-bit Password
Reserved
ADC Calibration Data
Reserved
User OTP (1K x 16, Secure Zone)
Reserved
L0 SARAM (4K x 16, Secure Zone Dual Mapped)
L1 SARAM (4K x 16, Secure Zone Dual Mapped)
L2 SARAM (4K x 16, Secure Zone Dual Mapped)
L3 SARAM (4K x 16, Secure Zone Dual Mapped)
Reserved
Boot ROM (8K x 16)
BROM Vector - ROM (32 x 32)
(Enable if VMAP = 1, ENPIE = 0)
Data Space
Prog Space
Reserved
XINTF Zone 0 (4K x 16,XZCS0)
(Protected) DMA Accessible
Reserved
XINTF Zone 6 (1 M x 16, XZCS6)(DMA Accessible)
XINTF Zone 7 (1 M x 16, XZCS7)(DMA Accessible)
Reserved
LEGEND:
Only one of these vector maps-M0 vector, PIE vector, BROM vector- should be enabled at a time.
Figure 3-2. Memory Map
0x00 4000
0x00 5000
0x10 0000
0x20 0000
0x30 0000
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Functional Overview
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