SM320F28335PTPMEP Datasheet, PDF (105/167 Pages) Texas Instruments – Digital Signal Controller (DSC)

SM320F28335-EP
www.ti.com
SPRS581D – JUNE 2009 – REVISED MAY 2012
Device Power Vs SYSCLKOUT
1000.0
900.0
800.0
700.0
600.0
500.0
400.0
300.0
200.0
100.0
0.0
10 20 30 40 50 60 70 80 90 _{100 110 120 130 140 150}
SYSCLKOUT (MHz)
Figure 6-3. Typical Operational Power Versus Frequency
NOTE
Typical operational current for 100-MHz devices (28x32) can be estimated from Figure 6-2.
Compared to 150-MHz devices, the analog and flash module currents remain unchanged.
While a marginal decrease in IDDIO current can be expected due to the reduced external
activity of peripheral pins, current reduction is primarily in I_DD.
6.4.3 Thermal Design Considerations
Based on the end application design and operational profile, the I_DD and I_DDIO currents could vary.
Systems with more than 1 Watt power dissipation may require a product level thermal design. Care should
be taken to keep T_j within specified limits. In the end applications, T_case should be measured to estimate
the operating junction temperature T_j. T_case is normally measured at the center of the package top side
surface.
6.5 Emulator Connection Without Signal Buffering for the DSP
Figure 6-4 shows the connection between the DSP and JTAG header for a single-processor configuration.
If the distance between the JTAG header and the DSP is greater than 6 inches, the emulation signals
must be buffered. If the distance is less than 6 inches, buffering is typically not needed. Figure 6-4 shows
the simpler, no-buffering situation. For the pullup/pulldown resistor values, see the pin description section.
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Electrical Specifications 105