SM320F28335PTPMEP Datasheet, PDF (57/167 Pages) Texas Instruments – Digital Signal Controller (DSC)

SM320F28335-EP
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SPRS581D – JUNE 2009 – REVISED MAY 2012
CPU bus
ADC
CPU
PF0
I/F
ADC
DMA
PF0
I/F
ADC
RESULT
registers
ADC
control
and
RESULT
registers
ADC
PF2
I/F
External
interrupts
CPU
timers
L4
I/F
L4
SARAM
(4Kx16)
L5
I/F
L5
SARAM
(4Kx16)
L6
I/F
L6
SARAM
(4Kx16)
McBSP A
PF3 ^{McBSP B}
I/F ^ePWM/
HRPWM^(A)
registers
Event
triggers
L7
I/F
L7
SARAM
(4Kx16)
DMA bus
INT7
PIE
DMA
6-ch
CPU
A. The ePWM/HRPWM registers must be remapped to PF3 (through bit 0 of the MAPCNF register) before they can be
accessed by the DMA. The ePWM/HRPWM connection to DMA is not present in silicon revision 0.
Figure 4-1. DMA Functional Block Diagram
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Peripherals
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