C8051F321-GMR Datasheet, PDF (9/250 Pages) Silicon Laboratories – Full Speed USB, 16 k ISP FLASH MCU Family

C8051F320/1
Figure 8.1. External Capacitors for Voltage Regulator Input/Output ........................ 67
Table 8.1. Voltage Regulator Electrical Specifications ............................................ 68
Figure 8.2. REG0 Configuration: USB Bus-Powered ............................................... 68
Figure 8.3. REG0 Configuration: USB Self-Powered ............................................... 69
Figure 8.4. REG0 Configuration: USB Self-Powered, Regulator Disabled .............. 69
Figure 8.5. REG0 Configuration: No USB Connection............................................. 70
9. CIP-51 Microcontroller
Figure 9.1. CIP-51 Block Diagram............................................................................ 71
Table 9.1. CIP-51 Instruction Set Summary............................................................ 73
Figure 9.2. Memory Map .......................................................................................... 77
Table 9.2. Special Function Register (SFR) Memory Map...................................... 79
Table 9.3. Special Function Registers .................................................................... 80
Table 9.4. Interrupt Summary ................................................................................. 89
10. Reset Sources
Figure 10.1. Reset Sources...................................................................................... 99
Figure 10.2. Power-On and VDD Monitor Reset Timing ........................................ 100
Table 10.1. Reset Electrical Characteristics .......................................................... 105
11. Flash Memory
Table 11.1. Flash Electrical Characteristics .......................................................... 107
Figure 11.1. Flash Program Memory Map and Security Byte................................. 108
Table 11.2. Flash Security Summary ..................................................................... 109
12. External RAM
Figure 12.1. External Ram Memory Map................................................................ 114
Figure 12.2. XRAM Memory Map Expanded View ................................................. 115
13. Oscillators
Figure 13.1. Oscillator Diagram.............................................................................. 116
Table 13.1. Typical USB Full Speed Clock Settings............................................... 123
Table 13.2. Typical USB Low Speed Clock Settings.............................................. 124
Table 13.3. Internal Oscillator Electrical Characteristics ....................................... 125
14. Port Input/Output
Figure 14.1. Port I/O Functional Block Diagram ..................................................... 126
Figure 14.2. Port I/O Cell Block Diagram ............................................................... 127
Figure 14.3. Crossbar Priority Decoder with No Pins Skipped ............................... 128
Figure 14.4. Crossbar Priority Decoder with Crystal Pins Skipped ........................ 129
Table 14.1. Port I/O DC Electrical Characteristics ................................................ 138
15. Universal Serial Bus Controller (USB)
Figure 15.1. USB0 Block Diagram.......................................................................... 139
Table 15.1. Endpoint Addressing Scheme ............................................................. 140
Figure 15.2. USB0 Register Access Scheme......................................................... 142
Table 15.2. USB0 Controller Registers .................................................................. 144
Figure 15.3. USB FIFO Allocation .......................................................................... 147
Table 15.3. FIFO Configurations ............................................................................ 148
Table 15.4. USB Transceiver Electrical Characteristics ........................................ 168
16. SMBus
Figure 16.1. SMBus Block Diagram ....................................................................... 169
Rev. 1.4
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