C8051F321-GMR Datasheet, PDF (234/250 Pages) Silicon Laboratories – Full Speed USB, 16 k ISP FLASH MCU Family

C8051F320/1
20.2.4. Frequency Output Mode
Frequency Output Mode produces a programmable-frequency square wave on the module’s associated
CEXn pin. The capture/compare module high byte holds the number of PCA clocks to count before the out-
put is toggled. The frequency of the square wave is then defined by Equation 20.1.
Equation 20.1. Square Wave Frequency Output
F_CEXn
=
---------------^F----^P---^C---^A---------------
2  PCA0CPHn
Note: A value of 0x00 in the PCA0CPHn register is equal to 256 for this equation.
Where F_PCA is the frequency of the clock selected by the CPS2-0 bits in the PCA mode register, PCA0MD.
The lower byte of the capture/compare module is compared to the PCA counter low byte; on a match,
CEXn is toggled and the offset held in the high byte is added to the matched value in PCA0CPLn. Fre-
quency Output Mode is enabled by setting the ECOMn, TOGn, and PWMn bits in the PCA0CPMn register.
Write to
PCA0CPLn
0
ENB
Reset
Write to
PCA0CPHn ^ENB
1
PCA0CPMn
P ECCMT P E
WC A A A OWC
MOP P TGMC
1 MPN n n n F
6nnn
n
n
x 000 x
PCA0CPLn
Enable
8-bit
Comparator
8-bit Adder
PCA0CPHn
Adder
Enable
Toggle
match
TOGn
0 _{CEXn Crossbar}
1
Port I/O
PCA Timebase
PCA0L
Figure 20.7. PCA Frequency Output Mode
234
Rev. 1.4