C8051F321-GMR Datasheet, PDF (22/250 Pages) Silicon Laboratories – Full Speed USB, 16 k ISP FLASH MCU Family

C8051F320/1
be socketed. Silicon Labs' debug paradigm increases ease of use and preserves the performance of the
precision analog peripherals.
AC/DC
PC
Adapter
USB
Cable
USB Debug Adapter
Target Board
PWR
SILICON LABORATORIES
MCU
P1.6
Port 2
Port 1
Port 0
Port 3
Port 4
Figure 1.6. Development/In-System Debug Diagram
1.6. Programmable Digital I/O and Crossbar
C8051F320 devices include 25 I/O pins (three byte-wide Ports and one 1-bit-wide Port); C8051F321
devices include 21 I/O pins (two byte-wide Ports, one 4-bit-wide Port, and one 1-bit-wide Port). The
C8051F320/1 Ports behave like typical 8051 Ports with a few enhancements. Each Port pin may be config-
ured as an analog input or a digital I/O pin. Pins selected as digital I/Os may additionally be configured for
push-pull or open-drain output. The “weak pull-ups” that are fixed on typical 8051 devices may be globally
disabled, providing power savings capabilities.
The Digital Crossbar allows mapping of internal digital system resources to Port I/O pins (See Figure 1.7).
On-chip counter/timers, serial buses, HW interrupts, comparator outputs, and other digital signals in the
controller can be configured to appear on the Port I/O pins specified in the Crossbar Control registers. This
allows the user to select the exact mix of general purpose Port I/O and digital resources needed for the
particular application.
22
Rev. 1.4