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C8051F321-GMR Datasheet, PDF (153/250 Pages) Silicon Laboratories – Full Speed USB, 16 k ISP FLASH MCU Family
C8051F320/1
USB Register Definition 15.11. IN1INT: USB0 IN Endpoint Interrupt
R
R
R
R
R
R
R
-
-
-
-
IN3
IN2
IN1
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bits7–4:
Bit3:
Bit2:
Bit1:
Bit0:
Unused. Read = 0000b. Write = don’t care.
IN3: IN Endpoint 3 Interrupt-pending Flag
This bit is cleared when software reads the IN1INT register.
0: IN Endpoint 3 interrupt inactive.
1: IN Endpoint 3 interrupt active.
IN2: IN Endpoint 2 Interrupt-pending Flag
This bit is cleared when software reads the IN1INT register.
0: IN Endpoint 2 interrupt inactive.
1: IN Endpoint 2 interrupt active.
IN1: IN Endpoint 1 Interrupt-pending Flag
This bit is cleared when software reads the IN1INT register.
0: IN Endpoint 1 interrupt inactive.
1: IN Endpoint 1 interrupt active.
EP0: Endpoint 0 Interrupt-pending Flag
This bit is cleared when software reads the IN1INT register.
0: Endpoint 0 interrupt inactive.
1: Endpoint 0 interrupt active.
R
EP0
Bit0
Reset Value
00000000
USB Address:
0x02
Rev. 1.4
153